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- immunological memory cells 免疫记忆细胞
- immunological memory cell 免疫记忆细胞
- Only humoral immunity displays immunological memory. 只有体液性免疫能表现免疫的记忆性。
- Characterize standard logic cells and memory cells. 提取标准逻辑单元和存储电路的参数。
- The memory cells may be multistate memory cells. 该存储单元可以是多状态存储单元。
- A transistor memory cell can be made with any number of terminals. 晶体管存贮单元端点的数量是不受限制的。
- Immunological memory is an important characteristic of adaptive immune response and elucidation of its cellular basis is critical for vaccine exploration and disease prevention. 免疫记忆是适应性免疫应答的重要特征,其细胞学基础的阐明是疫苗开发和疾病预防的关键。
- Physical addresses are used to address memory cells in memory chips. 物理地址是用来真正访问内存单元的地址。
- Unused memory cells following the BELL&RET command are considered free. 在电铃&浸水使柔软指令之后的不用记忆单元是考虑过的免费。
- Flip-flops are a key componemt and memory cells of sequential logic circuit. 触发器是构成时序逻辑电路的存储单元和核心部件。
- Both 18C-TT and 19F-TT induced immunological memory responses in mice. The induced IgG showed good affinity and complement-depen-dent opsonophagocity, and could clear the infection of streptococcus pneumonae effectively. 18C-TT和19F-TT免疫小鼠后,能有效地产生再次免疫应答,其IgG有良好的亲和力和补体依赖的调理吞噬功能,能有效地清除肺炎链球菌的感染。
- immunologic memory cell 免疫记忆细胞
- Hence, T-regs appear to contribute to maintaining immunological memory, a process that is crucial for immunity to repeated infection and that also underlies the success of vaccination. 因此,调节性T细胞似乎关系到免疫记忆的维持,这个步骤不但与再感染时的免疫力有关,也是让疫苗得以成功防范疾病的关键机制。
- One was a technique to lay down polysilicon so that each island of a single crystal is large enough to encompass many memory cells or transistors. 第一种技术是铺陈多晶矽的技术,这项技术使每一个单晶矽岛变得足够大,因而能包含更多的记忆胞或电晶体。
- We have already seen how variables are seen as memory cells that can be accessed using their identifiers. 我们已经看到了,变量是如何被看作可以通过它们的标识符来访问的内存单元的。
- All modern operating systems, including Linux, use this kind of addresses to access the contents of memory cells. 在所有的现代操作系统中,系统都是使用虚地址去访问内存单元的。
- immunological memory T lymphocyte 免疫记忆T淋巴细胞
- A memory cell array includes a plurality of memory cells each of which has a control gate and a floating gate. 存储单元阵列包括多个存储单元,每一存储单元具有控制栅和浮动栅。
- This problem can occur if 70 (binary 1000110) has been changed to 6 (binary 000110) by an unstable memory cell. 如果不稳定的内存单元已将70(二进制为1000110)更改为6(二进制为000110),则会发生此问题。
- A scheme for implementation of a 4 kbit serial ferroelectric nonvolatile memory is proposed, which is composed of 2T 2C memory cells. 文章提出了一个基于 VLSI的 4k位串行铁电不挥发存储器的实现方案。 该电路采用2 T- 2 C的存储单元设计 ,针对铁电电容的读出和写入的电流电压特性设计了相应的读写时序 ,给出了状态机的描述和相应的电路实现。
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