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- The sensor was fabricated by standard CMOS process plus some post-processing. 传感器采用标准CMOS工艺与后处理工艺相结合的方式制造。
- The standard CMOS process and integrated TTL drivers contribute to a reduced solution cost and PCB board space compared to most GaAs-based solutions. 由于采用标准的CMOS工艺和集成的TTL驱动器,所以比大多数基于砷化镓的解决方案降低了器件的成本和占用的印制电路板(PCB)面积。
- A low gas pressure sensor based on micro-hotplate(MHP) is designed and successfully fabricated by a standard CMOS process followed by surface micromaching. 研制了一种采用CMOS工艺和表面牺牲层技术加工的微热板式低气压传感器。
- These R-MOSFET-C filters,implemented in a standard CMOS process, utilize the linearized model behavior of anMOS transistor operating in the triode region instead of a passive resistor. 这些滤波器用标准的CMOS工艺实现,利用工作在线性区的MOS管来替代无源电阻。
- Design of Low Cost Ring Oscillator Based on Standard CMOS Process 一种基于标准CMOS工艺的低成本振荡器的设计
- Keywords Ultra high frequency (UHF);Radio frequency identification (RFID);Tag chip;Low power;Low cost;Sub-threshold;Standard CMOS process;EEPROM;Charge pump; 超高频;射频识别;电子标签;标签芯片;低功耗;低成本;亚阈值;标准CMOS工艺;EEPROM;电荷泵;
- Standard CMOS process 标准CMOS工艺
- It is designed and fabricated with the 0.25 um CMOS process. 年;设计及生产工艺为0.
- An idiographic process flow which only needs adding two lithography steps and four implantations in the standard CMOS technology is given. 提出了具体的工艺制作流程-在标准工艺的基础上添加两次光刻和四次离子注入工程,并成功进行了流片试验。
- Based on the ISFET structure and electronic characteristics, a method integrating the ISFET and signal process circuit realized in an standard CMOS technology are presented. 摘要在对离子敏场效应晶体管(ISFET)基本结构及电学特性分析的基础上,提出了一种基于CMOS技术实现ISFET与信号处理电路集成化的设计方法。
- The 1000Base-T PHY chip was taped out with CMOS process, 208 pins QFP. 本电路参加了 CMOS工艺流片,整个1000Base-T PHY芯片采用208管脚QFP封装。
- The LPF was accomplished with MEMS process, which is compatible with standard CMOS IC technology. Measurement results give - 3dB bandwidth of 2. 925GHz and midband insertion loss of 1. 2dB at 1GHz. 利用MEMS工艺实现的低通滤波器;其-3dB带宽和通带内插入损耗分别为2.;925GHz和1
- The rapid advance of standard digital CMOS process technology and circuit design methodology has enabled complex electronic systems to be integrated in single chips (System On Chip). 随着标准数字CMOS工艺技术以及电路设计技术的迅速发展和成熟,集成电路已经进入了一个片上系统的时代,系统级芯片(System-On-Chip,简称为SOC)已成为微电子领域当前最引人瞩目的话题之一。
- This thesis presents two voltage controlled oscillators and four injection locked frequency dividers, which are implemented by using standard TSMC and UMC 0.18um CMOS process respectively. 摘要:此论文提出了二个压控振荡器和四个注入锁定除频器,它们分别使用了标准台积电0.;18微米和联电0
- This circuit is developed in UMC 0.25 standard CMOS technology and at 2.5-V supply voltage with power consumption 10.8mw. 该电路采用2.;5V单电源供电,UMC 0
- This thesis presents one voltage controlled oscillator and two injection locked frequency dividers, which are implemented by using standard TSMC 0.18um and 0.35um CMOS process respectively. 摘要:此论文提出了一个压控振荡器和二个注入锁定除频器,它们分别使用了标准台积电0.;18微米和0
- The layout was designed with L-EDIT and the wafers were fabricated with double-polysilicon, N well CMOS process. 利用L-EDIT进行全定制版图设计,利用双层多晶硅N阱CMOS工艺进行芯片制造。
- For the first time, a standard CMOS technology can offer gain, bandwidth, and power performances comparable to advanced compound semiconductor technologies (SiGe, GaAs, InP). 第一次利用CMOS技术所设计的宽频放大器可达到增益、频宽、输出功率可以与高阶的化合物半导体技术(矽化锗、砷化镓、磷化铟)。
- In this thesis, a low power 12bit 80MS/s pipelined ADC is designed in TSMC 3.3V 1P5M 0.25um CMOS process. 本文基于TSMC 3.;3V 1P5M 0
- SONOS flash memory has numerous advantages, such as excellent salability, high endurance, low power, radiation hardness, and is highly compatible with standard CMOS technologies. SONOS闪存拥有许多优势,如极好的销路、高持久性、低动力支持、辐射硬度和拥有标准CMOS技术的高压缩性。