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- global clock synchronization 全球时钟同步
- Understand clock synchronization using phase-lock loop (PLL). 理解用锁相环(PLL)实现时钟同步。
- Clock Synchronization is one of the key questions in the distributed control network system. 分布式控制网络系统中的核心问题之一就是时钟同步问题。
- A kernel structure is presented, which adopts data fusion to support precision-demanding clock synchronization tasks. 该内核结构采用数据融合加强对精度要求较高的时钟同步任务的支持。
- Therefore,this article is mainly about the resolvent of clock synchronization in the CANbus. 因此文章主要研究CAN网络中的时钟同步问题的解决方法。
- Combined with an Atomic Clock Synchronization feature, the shutdown time is accurate. 被与一个原子的时钟结合起来起重要作用,关闭时间是准确的。
- This page explains how ICMP timestamps are used to solve clock synchronization issues. 本页解释ICMP时间戮记如何使用来解决时序同步化议题。
- In this paper,a scheme of radar timer based on FPGA for SAR is given.The reasonable clock design minimizes the skew of Global Clock and gets accurate synchronous Global Clock. 给出了一种采用FPGA实现合成孔径雷达定时器的设计方案,通过合理的时钟设计,使全局时钟的畸变达到最小,保证得到高质量同步的全局时钟。
- Experimental results suggest that the multi-hop error accumulation of the clock synchronization algorithm is reduced after data fusion. 试验数据表明,数据融合后时钟同步算法中的多跳误差累积得到明显降低。
- The tight timing guaranties of Controller Area Network(CAN)) 6ffer a simple and practicable possi-bility to provide such a global clock without additional hardware. 在分布式系统中,一种解决方法是将网络中所有节点的本地时钟以足够的精度进行控制同步。
- In this paper, a scheme of radar timer based on FPGA for SAR is given.The reasonable clock design minimizes the skew of Global Clock and gets accurate synchronous Global Clock. 摘要给出了一种采用FPGA实现合成孔径雷达定时器的设计方案,通过合理的时钟设计,使全局时钟的畸变达到最小,保证得到高质量同步的全局时钟。
- By analyzing the features of OCSP and PMI,this paper brings a clock synchronization technology based on OCSP middleware to solve the problem. 该文通过对在线证书状态协议(OCSP)及PMI认证特性的分析,提出一种基于OCSP中间件的时钟同步技术。
- The frequency synchronization and sampling clock synchronization technique in high definition TV (HDTV) are investigated. 摘要研究了高清晰度数字电视(HDTV)中的频率同步及采样钟同步技术。
- Instead, more robust protocols such as Network Time Protocol (NTP) at the upper layers of the TCP/IP protocol stack perform clock synchronization in a more reliable manner. 代替的是,更强健的协定,诸如TCP/IP协定堆叠的较上层的网路时间协定(NTP)以更可靠的方式执行时序同步化。
- A kind of offline clock synchronization algorithm is promoted based on the character of clock behavior and the cause and pattern of inaccuracy,with performance analysis provided. 通过研究普通时钟行为特点,分析时钟误差产生的原因和规律,提出了一种离线时钟同步算法,并对其性能进行了分析。
- Always use the global clock buffers on the FPGA to drive internal clock signals. These clock buffers and the associated clock distribution network have been carefully designed to minimize skew. 在FPGA上始终使用全局时钟缓冲来驱动内部时钟信号。并且已经仔细设计了这些时钟缓冲和关联时钟配电网,以将畸变减至最小。
- Clock synchronization error of IEEE 1588 standard is theoretically analyzed.At last, concrete systemwide application strategies of IEEE 1588 standard in area power network are researched. 文章从理论上分析了IEEE 1588标准的时钟同步误差,最后从全网的角度探讨了该标准的具体应用策略。
- As for the high precision positioning of underwater targets, the GPS sonobuoy technique has two bottlenecks: high precision system clock synchronization and high accuracy time delay estimation. 为了实现水下载体高精度的定位,GPS声纳浮标需解决两个方面的技术难点:高精度的系统时钟同步和定位信号的高精度时延估计。
- DS-SDH622 can be flexibly configured as ADM, MADM, TM, REG and other types of network element capabilities, more complete business configuration, drop, clock synchronization and other functions. (G翻译) DS-SDH622 is a new one on behalf of the SDH-based multi-service transmission equipment; the device interface; a rich (E3; DS3; etc.
- Application of GPS satellite synchroclock in clock synchronism of power system [J].Relay,1997,25 (2) :40-42. GPS卫星同步时钟在电力系统时钟统一的应用[J].;继电器;1997;25(2):40-42