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- combinational logic gate 组合逻辑门
- Lesson1 How does a logic gate in a microchip work? 第一课芯片上的逻辑门是如何工作的?
- A combinational logic element having at least one input channel. 一种至少有一个输入通道的组合逻辑元件。
- Literal Logic Gate, ternary invertor has been explained by this quenching concept. 主要从事化合物半导体器件及其集成电路、单片及混合光电集成电路的研究工作。
- A clock Network is combinational logic between a clock source and the registers in the transitive fanout of the source. 时钟网络：网络是一个时钟之间的时钟源和源寄存器传递扇组合逻辑。
- SSI chips are usually basic logic gates and flip-flops. 小型集成电路通常是最基本的逻辑栅门。
- The realization of a combinational logic circuit simulation platform with Applet technology of Java 2 is introduced in this paper. 介绍了以Java 2标准中的Applet技术开发组合逻辑电路网络仿真实验平台的原理.
- After study a series array multipliers algorithms and architectures, . the author design a high-performance multiplier in logic gate level, which using Booth and Wallace skill. 本文研究讨论了各种不同阵列乘法器的结构和原理,并完成了在门电路级设计了32位基4Booth编码并采用42压缩的Wallace高性能阵列乘法器电路。
- To improve the speed and efficiency of combinational logic circuit design, this paper presented a Game Genetic Algorithm (GGA). 为了有效提高组合逻辑电路进化设计的速度和效率，提出了一种基于博弈遗传算法的电路进化设计算法。
- Once this occurs, even though the ions may be widely separated, the manipulation of one of the qubits will affect the other, allowing the construction of a CNOT logic gate. 一旦这事发生了，即使离子距离很远，操纵其中一个量子位元时还是会影响到另外一个，所以可以做出成功的CNOT逻辑闸。
- Multiplexer is a kind of combinational logic circuit, which can be selected an in-put datum among several data and sent it to out-put port. 数据选择器是一种能从多个输入数据中有选择地将一个输入数据送到输出端的组合逻辑电路。
- In this paper a method of a combinational logic B/BCD converosin Jor any BCD code is investigated, And some example are given to illustra-te the use of the method. 本文以几种常用的BCD码为例;深入研究任意BCD码的B/BCD转换的组合逻辑变换网络.
- Digital Design: Binary System , Boolean Algebra , Logic Gates , Simplification of Boolean Functions , Combinational Logic.Analog Design: Amplifiers , Frequency Response , Feedback , Operational Amplifier. 数位设计：二进位制、布氏代数、逻辑闸、布氏函数的化简、组合逻辑电路。类比设计：放大器、频率响应、反馈系统、运算放大器。
- By dividing RTL description into combinational logic and sequential logic, the method reuses the combinational logic synthesis and sequential logic synthesis in the controller synthesis, thus reducing the time used in developing RTL synthesis. 提出一种通过将RTL描述划分为时序逻辑与组合逻辑后 ;重用控制器综合中的组合逻辑综合和时序逻辑综合实现 RTL综合的方法 .;此方法有效地利用了已有的成熟技术;为缩短 RTL综合的开发时间提供了一种有效途径
- Starting with MOS transistors, the course develops a series of building blocks - logic gates, combinational and sequential circuits, finite-state machines, computers and finally complete systems. 从基本的MOS电晶体开始，本课程说细说明了建构一台计算器所需的各个区块，像是逻辑闸、组合及循序电路、有限状态机。最后组成整个系统。
- The Deka value T gate is a kind of multi functional and general logical unit. It has independent perfection function,and it can realize any combination logic and sequential logic. 十值T门是一种多功能通用逻辑部件;具有独立的功能完备性;它可以实现任何组合逻辑和时序逻辑.
- Digital Design： Binary System, Boolean Algebra, Logic Gates, Simplification of Boolean Functions, Combinational Logic. Analog Design： Amplifiers, Frequency Response, Feedback, Operational Amplifier. 数位设计：二进位制、氏代数、辑闸、氏函数的化简、合逻辑电路。类比设计：放大器、率响应、馈系统、算放大器。
- In designing auto-control devices including computer, apart from the combinational logic design, the now fairly popular method which attracts daily increasing attention is the microprogramming. 设计包括计算机在内的自动控制装置,除采用组合逻辑设计方法外,目前比较流行、且愈来愈为人们重视的方法,是微程序设计方法。
- In chapter two, A new scheme to realize quantum logic gates, including CNOT gate and swap gates, and quantum teleportation are described by making use of Josephson junctions. 本文研究约瑟夫森结和腔场相互作用的量子动力学行为，并研究利用此类相互作用系统实现量子计算和量子信息处理的方法。
- To improve the speed and efficiency of combinational logic circuit design, this paper presented a Game Genetic Algorithm (GGA).In GGA, each output of the circuit was regarded as a player. 摘要为了有效提高组合逻辑电路进化设计的速度和效率，提出了一种基于博弈遗传算法的电路进化设计算法。
