您要查找的是不是:
- In this paper,intrinsic silicon epitaxial layers were grown on N type(As doped) substrate by UHV/CVD,which were then characterized using SPR,AFM and DCXRD methods. 文章利用自行研製的超高真空化學氣相澱積(UHV/CVD)系統SGE500,在N型(摻As)重摻雜襯底上進行了薄本徵硅外延層生長規律的研究; 並採用擴展電阻(SPR)、原子力顯微鏡(AFM)、雙晶衍射(DCXRD)等方法,對外延層的質量進行了評價。
- Testing of semi-conductive inorganic materials; measuring the thickness of silicon epitaxial layer thickness by infrared interference method 無機半導體材料的檢驗。用紅外線干涉法測量硅外延生長層的的厚度
- N type and P type 4"-6"silicon epitaxial wafers. 4"-6"N型和P型各類硅外延片。
- Test method for thickness of lightly doped silicon epitaxial layers on heavily doped silicon substrates by infrared reflectance 重摻雜襯底上輕摻雜硅外延層厚度的紅外反射測量方法
- Standard test method for net carrier density in silicon epitaxial layers by voltage-capacitance of gated and ungated diodes 用柵控和非柵控二極體的電壓-電容關係測定硅外延層中凈載流子濃度的標準方法
- n--type silicon epitaxial layers were grown on arsenic-doped n+-type silicon substrate by ultra-high vacuum chemical vapor deposition(UHV/CVD). 利用超高真空化學氣相澱積 (UHV/ CVD)設備 ;在摻 As n+ 型 Si襯底上生長了摻 P n- 型 Si外延層 .
- The silicon carbide epitaxial layer may have a thickness and a doping level so as to provide a charge in the silicon carbide epitaxial region based on the surface doping of the blocking layer. 碳化硅外延層可以有一厚度和一摻雜水平使得在阻擋層表面摻雜的基礎上提供碳化硅外延區內的電荷。
- The performance of model WB30 is the same as the 1S2209/1S2208 VHF/UHF silicon epitaxial planar tuning diode made by NEC company. 結果表明WB30型VHF/UHF硅電調變容管已與日本NEC公司的VHF/UHF硅外延平面電調變容管1S2209/1S2208的性能相當.;電調變容管的統調特性及其串聯電阻直接與電視高頻頭的增益相關
- Low-level human body model(HBM)ESD stresses were imposed on microwave low noise amplifier NPN silicon epitaxial transistor 2SC3356; it was shown that the DC current gain hFE degraded gradually with the increment of the times of ESD stresses. 從CB管腳對微波低雜訊NPN晶體管2SC3356施加低電壓人體模型(HBM)的ESD應力;發現;隨著ESD應力次數的增加;器件的放大特性hFE逐漸退化;並且當電壓達到一定水平;多次的ESD可以使器件失效.
- P-type field effect transistor includes a second N-type buried layer and the said P-type epitaxial layer formed in the P-type substrate. 一P型場效晶體管包括有一置於該P型襯底內的一第二N型嵌入層與該P型外延層。
- In this paper,I suggest the integration ?C V? method that is applicable to measuring Si epitaxial layer resistivity of homogeneity with impurity longitudinal distribution. 本文提出了積分C-V法,它適用於雜質縱向分佈均勻的外延層電阻率的測量,該方法簡便。
- silicon epitaxial planar transistor 硅外延平面晶體管
- Silicon Epitaxial Planar Capacitance Diode 硅外延平面變容二極體
- silicon epitaxial highcurrent switching diode 硅外延大電流開關二極體
- The two structure LDMOS was compared by simulation with MEDICI software. The result is that their breakdown voltage is almost the same and the thin epitaxial layer LDMOS?s Ron is lower. 通過MEDICI模擬對兩種器件進行比較,結果為兩種器件耐壓相當,薄外延LDMOS導通電阻略低。
- low-pressure silicon epitaxial technique 低壓硅外延生長技術
- silicon epitaxial planer transistor 硅外延平面晶體管
- Impurity doped during epitaxy will diffuse in the epitaxial layer and even into the substrate. 在半導體器件製造的外延工藝中,外延生長時通常要摻入雜質。
- Epitaxial layers of InSb and InAs_xSb_(1-x)on(111)InSb and (100)GaAs substrate have been grown by MBE technique. 在(111)InSb 和(100)GaAs 襯底上,用分子束外延技術生長了 InSb 和 InAs_xSb_(1-x)外延層。
- SOI material fabricated by using epitaxial layer transfer of porous silicon 多孔硅外延層轉移製備SOI材料的研究