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- shadow page table 阴影页表
- Gets the engine's page table array. 得到引擎的页表数组。
- A hardware register containing the physical address of the system page table. 一种硬件寄存器,其中保存有系统页表的物理地址。
- The page tables are usually not pageable. 网页表格通常不分页。
- To break the linear address corresponding to each page table component, various macros are used in the kernel. 要将线性地址划分成对应的每个页表元素,需要在内核中使用不同的宏。
- Each level of page table deals with different sizes of memory - this global directory may deal with areas 4 MB in size. 每一级的页表都处理不同大小的内存这个全局目录可以处理4 MB的区域。
- At bootstrapping, the system sets up the page table for 8 MB of physical memory. 在启动时,系统为8 MB的物理内存设置页表。
- When one of these switches is present, the computer may run out of available system page table entries. 当存在,之一这些开关时计算机可能运行超出可用系统页面表条目。
- Each process has its own set of page directories and page tables. 每个进程都有自己的页目录和页表。
- Locking TLB entries can ensure that a memory access to a given region never incurs the penalty of a page table walk. 锁定TLB输入能确保对于给出区域的内存读取绝不会导致页表移动的掉失。
- The page table must supply different virtual memory mappings for the two processing. 分页表必需为这两个进程提供不同的虚拟内存映射。
- Register.The directory field within the linear address determines the entry in Page Directory that points to the proper Page Table. 寄存器中。线性地址中的Directory字段确定页目录中指向恰当的页表条目。
- The address in table field determines the entry in the Page Table that contains the physical address of the page frame containing the page. Table字段中的地址确定包含页的页框物理地址所在页表中的条目。
- Now that you have a form layout table inside the page table, you can finish laying out the page by editing the page layout table. 现在,页面表格内有一个窗体布局表格,可以通过编辑该页布局表格来完成对该页的布局。
- A page table is an array of integers; each integer represents the number of characters on a page. It is required for pagination. 一个页表示一个整数数组,每一个整数代表一页中的字符数,这对分页有要求。
- He had to live in the shadow of his famous father. 他不得不在他那有名望的父亲的庇护下生活。
- The shadow of death is on his face. 死亡的阴影笼罩在他的脸上。
- The police put a shadow on the suspected robber. 警方派探员盯住那个抢劫疑犯。
- Page Directory Entry.In an MMU with two level page table, this term is used for the 32 bit entry in the first level table, or page directory.Each PDE maps 1M on ARM, 4M on X86. 页目录入口：在一个拥有二级页表的MMU中，PDE用作32位的第一级表或者页目录的入口，每个PDE在ARM系统内存中映射1M空间，在X86系统内存中映射4M空间。
- In an MMU with two level page table, this term is used for the 32 bit entry in the second level table, or page table.Each PTE maps 4K on ARM and 4K on X86. 在一个拥有二级页表的MMU中，用作32位的第二级表或者页表的入口，每个PTE在ARM系统内存中映射4k空间，在X86系统内存中映射4k空间。
