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- The Nios embedded processor is a softcore 16/32 bits RISC CPU optimized for Altera programmable logic devices. SoPC(Svsetm on Programmable Chip)是基于可编程逻辑的片上系统,Nios处理器是一个基于FPGA的16/32位的软核RISC处理器。
- It is an efficient method that realizing the contro l circuit of a power source system with FPLDs (Field Programmable Logic Devices) . 使用现场可编程逻辑器件实现各种电源控制电路是一种非常有效的设计方法。
- A method based on VHDL language automatically queued was introduced, and the programmable logic devices were used to achieve and verify. 介绍一种基于VHDL语言实现自动排队取号的方法，并采用可编程逻辑器件加以实现和验证。
- A high performance 3-phases full controlled thyristor trigger is achieved by the complex programmable logic devices (CPLD) and the advanced EDA software. 摘要采用复杂可编程逻辑芯片CPLD和先进的EDA设计软件，实现了高性能的三相全控桥晶闸管的数字触发器。
- This project has entered its back-end design phase, the first version of a demo system on the Programmable Logic Devices (PLDs) board had been developed. 项目取得阶段性进展，完成了第一版的可编程逻辑器件(PLDs，Programmable Logic Devices)演示系统，并将在答辩会上进行演示。
- It details the IC design process and VLSI circuits, including gate arrays, programmable logic devices and arrays, parasitic capacitance, and transmission line delays. 它详细规定了集成电路设计过程和超大规模集成电路电路，包括门阵列，可编程逻辑器件和阵列，寄生电容，及输电线路的延误。
- Based on electrical design automation(EDA)software and EDA tools of the third generation,a design method of CPLD(complex programmable logic devices) is proposed. 主要介绍利用复杂可编程逻辑器件的设计来实现通信模块。
- CPLD,developed on the basis of traditional PAL and GAL,means Complex Programmable Logic Devices,having many kinds of working way,with high integration,high speed and high reliability. CPLD是在传统的PAL和GAL基础上发展起来的具有多种工作方式、高集成、高速、高可靠性的复杂可编程逻辑器件。
- Firstly, the theory of the radar signal processing rackis introduced, and some Application Specific Integrated Circuits (ASIC) in this radar areanalyzed in detail and then replaced with programmable logic devices. 首先分析了该雷达信号处理的原理，对其中用到的专用集成电路（ASIC）进行了仔细的剖析，并用可编程逻辑器件实现了相应的功能，为雷达信号处理机的研仿做了必要的准备。
- Aiming at the application environment, the system is miniaturized with PLD (Programmable Logic Device) and low-power devices. 考虑到实际应用环境，利用逻辑可编程器件对系统进行微小型化，选用低功耗器件；
- Using programmable logic device CPLD/FPGA, designed a instrument interface converter for GPRB/ RS232C. 用大规模可编程器件CPLD/FPGA设计了一个GPIB/RS232C接口标准的转换器,比旧式的缩小了体积,提高了速度。
- The design of the driving generator for TDI/CCD was introduced based on complex programmable logic device (CPLD) . 提出了基于CPLD(复杂可编程逻辑器件)实现TDI/CCD(时间延时积分、电荷耦合器件)驱动电路的方法。
- First,this paper generally introduces the development of Programmable Logic Device(PLD) and the characteristic of FPGA. 本论文内容安排如下:第一章介绍了PLD(可编程逻辑器件)和OFDM(正交频分复用)技术的发展历史。
- The hardware circuit and the software design of the Programmable Logic Device based on VHDL are designed. 最后设计了该数字控制系统的硬件电路,通过VHDL语言对硬件电路中的可编程逻辑器件进行软件设计。
- A multilevel laser power modulation method was developed based on the industry standard architecture (ISA) interface and a complex programmable logic device (CPLD). 该文描述了一种基于工业标准结构(ISA)总线和复杂可编程逻辑器件(CPLD)的多阶激光功率调制方法。
- The control system of IGBT induction heating power supply is designed based on DSP(digital signal processor) and CPLD(complex programmable logic device). 用数字信号处理器(DSP)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
- The paperfirstly introduces the advantage of CPLD(complex programmable Logic Device) andVHDL(VHSIC Hardware Description Language). 本文首先对 CPLD(复杂可编程逻辑器件)和 VHDL 进行了简要的介绍,并分析了使用 CPLD 进行电子设计的优点。
- After estimation of PRI, the PRI tracker(also called wheel tracker) is designed based on Complex Programmable Logic Device(CPLD). 在PRI参数估计之后，设计了基于可编程逻辑器件(CPLD)的PRI跟踪器(或称为飞轮跟踪器)。
- Trigger control circuit from complex programmable logic device (CPLD), ICL7135CN, the clock pulse circuit and optocoupler inverter constituted. 触发控制电路由复杂可编程逻辑器件（CPLD）,ICL7135CN,时钟脉冲电路、反相器和光耦构成。
- Complex programmable logic device(CPLD) is finally used in the ground decoding process and then the data is demodulated. 地面利用复杂可编程逻辑器件CPLD实现数据的解调。
