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- processor core memory 处理机磁心存储器
- The first core memory was envisioned in 1948. 在1948年第一个磁芯存贮器问世。
- For the majority of Exchange 2007 deployments, 4 (GB) of memory (1 GB per processor core) is sufficient and recommended for Client Access servers. 对于大多数Exchange 2007部署,客户端访问服务器使用4 GB(每个处理器核心1 GB)内存就足够了,并且建议这样配置。
- A pulse to gate the output of a core memory sense amplifier into a trigger in a register. 将磁心存储器读出放大器的输出选通到寄存器的触发器中的一种脉冲。
- Large-scale deployments, especially those with Outlook Anywhere as the primary client access method, should consider using a 2-GB per processor core. 对于大规模部署,尤其是将Outlook Anywhere作为主要客户端访问方法的部署时,应考虑对于每个处理器核心使用2 GB内存。
- A pulse to gate the output of a core memory sense amplifier into a triggerin a register. 将磁心存储器读出放大器的输出选通到寄存器的触发器中的一种脉冲。
- ARM7TDMI, one processor core of ARM, is very suitable to be applied in control field where requires low power consumption and network support, although the programming should be taken care because of not having a MMU in it. 其中,ARM公司的ARM7TDMI系列特别适合于低功耗、需要网络支持的工控设备。 但因ARM7TDMI不具有MMU模块,在相应的软件实现中需要特别处理。
- Multimedia accelerator module (MMA), on-chip SRAM and the related software optimization scheme are used in our SoC, leading to a SoC design method oriented to multimedia application based on low end RISC processor core. 通过在SoC中增加多媒体加速器(MMA)模块和片上SRAM以及相关的软件优化方案,提出了一种基于低端精简指令集计算机(RISC)处理器核的面向多媒体应用(MP3)的SoC设计方法。
- The thesis analyzed accuracy and error source of train positioning based on GNSS and ODO respectively, a train positioning system based on GNSS/ODO with embedded processor core is developed. 论文首先详细地分析了GNSS和ODO在列车定位中的精度以及误差来源,在此基础上开发了一种以嵌入式处理器为核心的基于GNSS/ODO的列车定位系统,该系统可以进行基于GNSS/ODO的列车定位信息采集、信息同步、信息记录和信息融合。
- The main research direction is to analyze and try to design the parallel architecture combinations between a stack-based Java processor core and an SIMD multimedia computation core. 主要研究之问题为Stack-based架构的Java处理器与SIMD的多媒体计算核心间各种平行执行与搭配的组合。
- Of course since rendering is done by the Blender rendering engine in core memory and by the main CPU of your machine, a graphic card with hardware acceleration makes no difference at rendering time. 当然,由于渲染是在主存和CPU上进行的,故带硬件加速的显卡对于渲染时间的缩短并没有帮助。
- There are differences of opinions obviously, but I recommend you look at processor cores when comparing performance results across solutions. 建议在比较解决方案的性能结果时查看处理器核心。
- Core memory: A type of memory that stores information on magnetically charged, doughnut shaped cores. Mass storage is currently mostly on magnetic disk ,drum, or taoe rather than core. 磁心贮记器:磁心像炸糖环的形状,存贮信息。它是磁化贮记器的一种。大量的信息存贮,现在多采用磁碟、碟鼓或磁带,用磁心贮记器较少。
- Core memory A type of memory that stores information on magnetically charged, doughnut shaped cores. Mass storage is currently mostly on magnetic disk, drum, or taoe rather than core. 磁心贮记器磁心像炸糖环的形状,存贮信息。它是磁化贮记器的一种。大量的信息存贮,现在多采用磁碟、碟鼓或磁带,用磁心贮记器较少。
- A Instruction-level Simulator of DSP Processor Core 一种DSP处理器内核的指令级模拟器
- Chip Multi-Processor(CMP) which integrates multiple processor cores on a single chip can improve system performance by exploiting thread-level parallelism. 片上多处理器(CMP)是指在单芯片上集成多个处理器内核,通过探索线程级并行提升系统的性 能。
- As has been mentioned during several Keynotes at NI week, LabVIEW has excellent capabilities to automatically use multiple processor cores due to its inherent parallelism. 像下图中(仅仅举个例子),本来是想在测试完成后将测试数据输出给下一个VI的,但是因为使用了局部变量,一不小心就有可能变成图中的程序了,而图中的程序在一开始时就读取了“测试数据”局部变量的值,等“中间一大堆程序”执行完后就将之前读取的测试数据值赋给显件了,而不是本次的“测试数据”。
- The terrible scene was engraved on his memory. 那可怕的情景铭记在他的记忆里。
- I can't vouch for the accuracy of my memory. 我无法保证我的记忆正确无误。
- After a comparison beteen two implementation schemes, a progromable media processing SoC based on two processor cores will be designed named MediaSOC3221A which can be used as audio and video decoding system for MPEG-like standard. 通过对两种体系结构的比较,我们自主研发了基于双处理器的可编程媒体处理系统芯片的硬件结构,并完成了兼容MPEG的数字音视频解码系统芯片MediaSOC3221A的设计。