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- multilevel logical circuit 多级逻辑电路
- The number of inputs available to a given logic circuit. 扇入，输入可在逻辑电路得到的输入端数目
- Usually, the abbreviation for logic circuit. 通常是“逻辑电路”的简写。
- Usually,the abbreviation for logic circuit. 通常是“逻辑电路”的简写。
- The level of complexity in testing the designed logic circuit and system. 对所设计的逻辑电路和系统进行故障测试的难易程度。
- Flip-flops are a key componemt and memory cells of sequential logic circuit. 触发器是构成时序逻辑电路的存储单元和核心部件。
- Finally, a guantum logical circuit which can carry out the unitary transformation is given. 最后，给出了实现这种传递的里子逻辑电路。
- Improved Algorithm to Multilevel Logic Optimization 一种改进的多级逻辑优化算法
- Watson Research Center,built the world's first logic circuit out of a single long carbon molecule called a nanotube. 该公司托马斯·沃森研究中心的物理学家造出全世界第一个以纳米管(一个长长的碳分子)为原料的逻辑电路。
- Based on Karnaugh map,the design principle and method of time sequence logical circuit auto start are put forward and expounded. 阐述了以卡诺图为基础的具有自启动功能的时序逻辑电路设计原理和设计方法。
- This paper discusses the foundation and the application of reduced-dimension Karnaugh map in numeral logical circuit design. 摘要文章介绍了在数字逻辑电路设计中降维卡诺图的建立和应用。
- The analysis and designation on the assembly logic circuit is one of the important content of digital circuit. 组合逻辑电路的分析设计是数字电路重点内容之一。
- The paper describes a two-input NOR circuit that is formerd by the capacity diode field effect logic circuit (CDFL). 叙述了用电容二极管场效应逻辑电路形式制作的二输入或非门电路。
- Our team is building an unusual form of crossbar logic circuit with arrays of switches and wired ANDs and ORs. 我们的小组正在利用开关阵列和接线上的AND与OR逻辑闸，建造一种不寻常的交叉杆逻辑电路。
- This is the logic circuit of a microcomputer and microprocessors are often the same as a microcomputer. 这是一种微型计算机的逻辑电路，一般微处理器跟微型计算机是一样的。
- Working frequency is from 50Hz to 5kHz. Measuring function and range change arecontrolled by logic circuit. 工作频率为50赫至5千赫。
- Karnaugh map plays an important role in the simplification of logic function and the design of logic circuit. 摘要卡诺图在逻辑函数的化简和逻辑电路的设计中，有着重要作用。
- A new method of designing synchronous sequential logic circuits is propsed. 提出了一种设计同步时序逻辑电路的新方法。
- Observable-don't-care-set Based Optimization for Multilevel Logic Functions 基于可观测无关项的多级逻辑优化
- The realization of a combinational logic circuit simulation platform with Applet technology of Java 2 is introduced in this paper. 介绍了以Java 2标准中的Applet技术开发组合逻辑电路网络仿真实验平台的原理.
