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memory control logic 存储器控制逻辑
Interface defines the control logic of an application. 接口定义了应用程序的控制逻辑。
A hardware pattern in which diode leads may be inserted to change solid-state control logic. 可用插入二极管引线来改变固态控制逻辑的一种硬件设计。
And the control logic of FPGA, image access via DMA are analyzed in detail. 并详细讨论了FPGA的控制逻辑,DMA图像存取等工作原理。
The target of DFI standard is a kind of between logic of definition memory controller and PHY interface general interface. DFI规范的方针是界说存储节制器逻辑和PHY接口之间的一种通用接口。
On the File menu, point to New, point to Maps and Floor Plans, and then click HVAC Control Logic Diagram. 在“文件”菜单上,依次指向“新建”和“地图和平面布置图”,然后单击“HVAC控制逻辑图”。
Mainly by modifying the control logic of the burner management system (BMS), the defects of the system are redeemed to enable its reliable operation. 通过修改锅炉燃烧器管理系统(BMS)的控制逻辑和增加保护的投入，弥补了系统的缺陷，保证灭火保护系统安全可靠地投入使用。
A prefetching policy in memory control system is proposed, which uses the idea of stream buffer proposed by Jouppi. 结合目前龙芯2号处理器系统总线的相关特征,提出了一种在存储控制系统内部实现的写缓存技术以提高系统的有效访存带宽。
Using FPGA to Implement DDR Memory Controller Scien? 利用FPGA实现DDR存储器控制器
According to experience of maintenance in BMS,give optimized scheme in control logic. 根据BMS系统的维护经验 ,提出了控制逻辑的优化方案
It is important to develop the ABS ECU, study the control algorithm of ABS, and validate control logic of existing ECU. 它对于ABS ECU的开发、ABS逻辑的研究、验证ECU控制策略的合理性及实用性都是很有效的工具。
To improve data transmission rate of JTAG interface, instruction register and related control logic are redesigned. 为了提高JTAG接口的数据传输效率，指令寄存器和相关控制逻辑被重新设计。
With running simulation, we can modify control logic and arithmetic and optimize system parameters. 运行纯仿真,以修正发动机仿真控制逻辑、制算法以及系统参数。
Continuous hot dip galvanizing line is a biggish electrical control project which is complex for control logic. 连续热镀锌生产线是较大型的电气控制项目,控制逻辑较为复杂。
I use JSP to editweb page, and use JAVA and EiB to realize application service.J2EEanswers for offering control logic. 其中，用JSP进行页面编辑，J2EE环境提供控制逻辑，JAVA及EJB实现应用服务。
They contain an 8-bit A/D converter, 8-channel multiplexer with an address input latch, and associated control logic. 它们包含一个8位A / D转换器， 8通道多工器的地址输入锁存，以及相关的控制逻辑。
It mainly consists of the minimum system of DSP, A/D conversion circuit, CPLD control logic, watchdog circuit, OP amplifier and filter circuit. 该模块主要由数字信号处理器最小系统、模数转换电路、复杂可编程逻辑器件控制逻辑、看门狗电路、运算放大器电路和模拟滤波器电路构成。
The memory controller offers dedicated locks to limit access to SMRAM memory only to system firmware (BIOS). 内存控制器提供独用的锁定机制，来限制只有系统固件(BIOS)能访问SMRAM。
I use JSP to edit web page, and use JAVA and EJB to realize application service. J2EE answers for offering control logic. 其中，用JSP进行页面编辑，J2EE环境提供控制逻辑，JAVA及EJB实现应用服务。