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- latching full adder 闩锁全加器
- Optical full adder composed of a ZnS interference filter[J]. 引用该论文 查子忠;王瑞波;张雷;李淳飞.
- We have done HSPICE simulation runs of the new style adder, 28-T CMOS full adder and conventional CPL style full adder. 并且通过HSPICE仿真,对28个晶体管的CMOS加法器、传统的CPL加法器和改进型的CPL加法器进行了比较。
- So enhancing the performances of the 1-bit full adder cell is a significant goal. 根据最优化函数式,设计了高性能CMOS管级全加器单元电路。
- The ideas presented in this paper are then demonstrated on the design of an ECL 1-bit full adder. 所提出的方法已用一位全加器的设计实例予以演示。
- This kind of adder is a ripple carry adder, since each carry bit "ripples" to the next full adder. 这种平行加法器最低位的进位输入必须序列地通过所有全加器后,才能产生最终的结果。
- The practicability of the system is validated by implementing the simulation of a one-bit full adder based on FPGA. 在FPGA平台上用一个一位全加器的实例,验证了系统的可实现性。
- FTR cavities containing nonlinear optical material inside can perform every kind of Boolean logic, even a single eevice ofthe FTR cavities can operate as a full adder. 本文提出,由两个准全反射介面构成的非线性光学耦合腔,能完成常规的各种布尔逻辑运算,甚至一个耦合腔就能实现一个光学全加器。
- Based on logic gates of complementary single-electron transistor (SET), three units are proposed as follows: full adder, shift register and ROM. 摘要基于互补型单电子晶体管(SET)逻辑门,提出了SET加法器、移位寄存器和ROM的单元电路。
- Then, based on this T gate, the 2-5 mixed-valued ten-valued full adder and full subtracter are designed directly by the truth tables. 然后,在此基础上,按真值表直接设计2-5混值/十值全加器和全减器的运算电路。
- In order to validate the feasibility,we using the BDD to implement a one-bit full adder on the Spartan-IIE series FPGA delivered by Xilinx Co. 为了验证此容错结构的可行性,以Xilinx公司的Spartan-IIE系列FPGA为实现硬件,使用BDD方法将一位全加器置于此阵列中,实现了一位全加器的容错,完成验证。
- The full adder cell circuits which are mentioned in the thesis include Basic CMOS FA (full adder), CL-CMOS FA, Pseudo-NMOS FA, CPL FA, TG FA, TF FA and CPL-TG FA. 这些单元电路包括基本CMOS全加器、CL-CMOS全加器、Pseudo-NMOS全加器、CPL全加器、TG全加器、TF全加器和CPL-TG全加器。
- Alter the full adder cell from NMOS circuit to CMOS circuit.Basing on it, the paper introduces the design flow of converting NMOS circuit into CMOS circuit and some questions of the design. 将其中的全加器单元NMOS电路改为CMOS电路,本文以此为例,介绍了将NMOS电路改为CMOS电路时,建立CMOS单元库的流程及应注意的问题。
- If I could only latch onto some of your know- how. 要是我能有一点你的那种决窍就好了。
- Latch on to some very valuable books. 搞到几本极有价值的书。
- Please latch the front gate when you leave. 走时请把大门的碰锁锁好。
- Please leave the door latch shut. 请把门闩上。
- He always latch on to me when he see me at a party. 他在聚会上一看见我就总是缠著我。
- Full Adder Design and Comparision 全加器的设计及比较
- If I could only latch on to some of your know how! 要是我能有一点你的那种诀窍就好了。