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- Single Metal Silicon Gate CMOS Gate Array Design System Galstar 单层布线硅栅CMOS门阵列设计系统Galstar
- A Real-Time Recognization Algorithm of Arabic Numerals and English Letters Based on Field-Programmable Gate Array Design 实时识别数字和英文字母快速算法的现场可编程门阵列设计
- gate array design system 门阵列设计系统
- We implement 2-D DCT function with Field Programable Gate Array (FPGA), and verify the design by the function simulation and timing simulation. 吾人使用FPGA实现非同步2D-DCT，并藉由功能模拟及时序模拟，来验证设计正确性。
- Introduced are features, design and development procedures of FPGA (Field Programming Gate Array) as well as its applications in depth logging modules (VXI). 摘要介绍了现场可编程闸阵列(FPGA)的特点、设计开发流程以及在深度测井模块设计中的应用。
- The objective of this research is the former-end hardware design for the 64-bit RISC(Reduced Instruction Set Cpomputer)CPU core and the implementation and verification of the design on FPGA(Field Programmable Gate Array). 本研究的目的是进行64位的精简指令集中央处理器的前端硬件设计，并将此设计在FGPA上实现以通过实际的电路验证。
- Field programmable gate array (FPGA) has many advantages such as high reliability, high speed and so on.The FPGA design can be also transferred to ASIC circuit and the system cost reduces largely. 现场可编程逻辑阵列(FPGA)有可靠性高、速度快等优点，同时可以把FPGA设计生成ASIC电路，从而大大减少系统成本。
- Programmable logic, in particular field programmable gate array (FPGA) is such a solution. 可编程逻辑，特别是现场可编程门阵列（FPGA）便是这样的解决方案。
- This paper introduces a method to implement UARTbased on Field Programmable Gate Array(FPGA). 文章介绍了一种在现场可编程门阵列(FPGA)上实现UART的方法。
- A new digital beam forming (DBF) method is proposed. It combines the parallel delay LMS (PDLMS) algorithm and the field programmable gate array (FPGA). 采用高并行度的并行延时最小均方 (PDLMS)算法 ,用现场可编程门阵列 (FPGA)实现自适应数字波束形成模块。
- The prototype of a Line - doubler system was finally implemented in hardware using FPGA (Field Programmable Gate Array) technology. 根据这种自适应处理的思想，用FPGA（现场可编程逻辑器件）进 行原形开发。
- Having a separate filter allows users to customize their filter respose, which can be done with one of our own DSPs or with a gate array. 采用单独的滤波器则便于用户定制滤波器响应，这可通过我们的DSP或通过门阵列完成。
- A high-resolution flight time measurement system based on a single field programmable gate array (FPGA) in laser altimeter is designed. 设计了在激光测高系统中基于单芯片现场可编程门阵列(FPGA)的高精度时间间隔测量模块。
- Array design and time delay estimation(TDE)algorithm are two key technologies of the whole research. 阵型的选择和时延估计算法的研究是被动声探测中两个关键技术。
- Then the hardware implementation scheme is discussed in detail, and the method of adopting Field Programmable Gate Array (FPGA) to realize control of the module is expatiated. 接着详细论述了模块的硬件实现方案,并着重分析了采用现场可编程门阵列(FPGA)技术控制模块的实现方法;
- An advanced digital controller based on Digital Signal Processor(DSP) and Field Programmable Gate Array(FPGA) is developed and applied in DCI-UPQC successfully. 同时,开发了一套适用于电力电子装置的基于数字信号处理器(Digital Signal Processor,简称DSP)和(Field Programmable GateArray,简称FPGA)的先进数字控制平台,成功地将其应用于DCI-UPQC样机。
- The basic concept of Evolvable Hardware(EHW) is introduced.Function Level EHW is explained based on Genetic Algorithm(GA) and Field Programmable Gate Array(FPGA). 介绍了可进化硬件的基本思想,阐述了基于遗传算法和现场可编程门阵列的函数级进化方法及其特点。
- A spatiotemporal chaotic map is digitized to develop a highly paralleled PRBS generator that accommodates to FPGA (Field Programmable Gate Array) implementation in present paper. (译)：阿时空混沌地图是数字化发展的高度并行PRBS发生器，可为FPGA的（现场可编程门阵列）执行本文件。
- High integration of imported large scale gate array device and high-speed CMOS integrated circuits ensure product reliability and low power consumption. 采用高速CMOS集成电路，进口超大规模门阵列器件，集成化高，保证了产品的可靠性和低功耗。
- ASIC Design for Field Programmable Gate Array 专用集成电路的FPGA设计
