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clock generator and driver 时钟发生驱动器
Can be used in the synthesis loop vibration, high-precision clock generator and FSK / / 3PSK modulation. 可用于本振合成回路，高精度时钟发生器和FSK／／3PSK调制。
The dissertation describes the principle of spread spectrum clock generator and its implement structure.Especially analyzes PLL and the loop divider. 本文先介绍了扩谱时钟发生器（SSCG）的基本原理以及扩谱时钟的不同实现电路结构，并对扩谱时钟发生器中的锁相环（PLL）以及环路分频器进行了分析。
One clock was in the shape of a cart with a horse and driver. 有一种钟的形状是一辆马车和一个骑着马的马车夫。
This is my father, a administrator and driver. 这是我的父亲，是一位管理员兼司机。
He was “cabbie” and “driver” and “you”! 他是“计程车司机”，“司机”，“你”。
Rear bodywork removed and driver's door open. 车身后方拆除和司机的大门依然敞开。
Check the emergency generator and report. 检查应急发电机并报告。
You should see one generator and one distributor. 您应看到一个生成器和一个分发服务器。
Great Wall cable car ( Free choice) Tips to guide and driver. 长城缆车费用(自选),导游司机小费。
There will be both a random map generator and a map editor. 将会有随机地图生成器,以及地图编辑器。
Alignment inspection installation of shaft generator and gear box. 轴带发电机及齿轮箱安装检查。
And finally, a clock generator based on the 3rd order CPPLL is fully designed with UMC 0.25 CMOS process. 最后，采用UMC 0.;25 CMOS工艺技术设计了一个用作时钟产生的三阶电荷泵锁相环。
In chapter two, a three nonoverlapping phases clock generator is presented at first and the experimental results are given finally. 在第二章中，一各三相非重叠电路将会被提出，而其实验结果将会被论述在本章之末。
Gratuity for tour guides and drivers. 导游及司机之小费。
Help me! Need recovery disk and drivers! 救救我那只鬼猫!
And drivers are in great demand. 司机到地方是最受欢迎的。
The whole AFE circuit includes a bias circuit, a clock generator, a chopper stabilization amplifier, a post-amplifier, and a second-order continues-time low-pass filter. 本文所提整体类比前端电路包含偏压电路、时脉产生器、截波稳定型放大器、后置放大器、和二阶连续时间低通滤波器。
Let's keep the criticism general and impersonal. 让我们作整体的批评，不要针对个人。
First, in order to analyze the PLL clock generator, we have established the loop parameters.The parameters effect on the PLL transient characteristic has been studied. 首先，为了分析锁相迴路时脉产生器，我们建立了迴路的参数并探讨这些参数对锁相迴路暂态响应的影响。