您要查找的是不是：
- Suppression of Inductive Switching or Other Transient Events Such as EFT and Surge Voltage at the Circuit Board Level. 抑制各种感性负载切换或各种瞬间噪声在电路板中产生的EFT和浪涌电压。
- Lastly, based on ASIC design flow, the RTL level circuit scheme of the VQ image coding system is suggested and synthesized in the available technology library. 西安理工大学硕士学位论文最后,基于ASIC的设计方法,对整个图像编码系统进行了RTL级的硬件设计,并在现有l_艺库条件卜对该设计进行了综合和时序验证。
- Today qualified executives from outside work on an equal footing with family members at board level . 今天，在董事会中高智慧的外来决策人与家族成员拥有同等的地位。
- Traditionally headhunting has been used to recruit senior management or board level positions. 传统意义上的猎头是用来招聘高层管理或者董事会级别的人员的。
- QUALIFICATION (DETAIL):Education:BSEE， MSEE preferredExperience:3+ years of experience of board level switch and LAN of ...... ... 公司名称：创锐讯通讯技术（上海）有限公司工作地点：上海市浦东新区发布时间：2009-8-1
- QUALIFICATION (DETAIL):Education:BSEE, MSEE preferredExperience:3+ years of experience of board level switch and...... ... 公司名称：创锐讯通讯技术（上海）有限公司工作地点：上海市发布时间：2009-4-18
- CONSULTANT Job Responsibilities:-Customer demonstrations, board level presentations, client responses to RFPs, w...... ... 公司名称：上海万宝盛华人力资源有限公司工作地点：上海市发布时间：2008-10-15
- Job Description:-Technical planning, and definition, of board level reference designs working closely with archi...... ... 公司名称：梦奇芯片技术（上海）有限公司工作地点：广东省深圳市发布时间：2009-4-24
- The second is that the level circuit adopted by azimuth compass aligning circuit can only be two-order and can't be three-order,but as a matter of fact,three-order level circuit can be ado... 方位罗经对准回路中;水平回路只能采用二阶调平回路;而不能采用三阶调平回路;而事实上采用三阶调平回路照样可以实现方位罗经自对准.;分析了原因;并给出了方位罗经对准原理更确切的描述
- Job Description:Under the lead of senior engineer, FPGA and board level PCB layout designs. Qualifications:B.S. ...... ... 公司名称：梦奇芯片技术（上海）有限公司工作地点：上海市发布时间：2009-3-31
- Senior level work experience would normally be a role at board level in a small company, in a larger business it may be as a department head or leader of project management team. 高级工作经历通常是在在一家小公司董事会水平的一个角色,在一个更大的企业它可以是一位部门主任或项目管理组的领导人。
- Leaded and lead-free BGA (ball grid array) components were tested in board level drop test defined in the JEDEC (Joint Electron Device Engineering Council) standard. 按照JEDEC标准对板级跌落实验的要求测试了有铅和无铅焊点的球栅阵列封装。
- Must realize the direct current machine velocity modulation first to transform the alternating current into the cocurrent, this needs the leveling circuit. 要实现直流电机调速首先要把交流电转换为直流，这就需要整流电路。
- As the developing of IC design and manufacture process, the board level system is integrated into a chip. SystemOnChip ( SoC) is becoming the primary trend. 集成电路制造工艺水平和设计水平发展到今天，人们已经将原先的板级系统集成在一个芯片上，系统芯片(SystemOnChip，简称SoC)逐渐成为集成电路设计的主流发展趋势。
- The simulation and the board level test result indicate that this SSM design method is correct and easy to realize, which also prove this SSM processing has a good performance. 仿真和调试结果表明了该SSM设计方法正确和易实现性,也验证了该SSM良好的性能。
- A replaceable printed circuit board. 一种可替换的印制电路板。
- Besides, the Karnaugh map method and algebra method are presented for designing component level circuits. 此外,本文提出元件级电路设计的卡诺图方法和代数方法。
- The advantage of testability synthesis to scan-test is which can perform function test , interlinkage test and existence test of component at board level. 将扫描测试进行可测性综合的优点是不仅可以进行器件的功能测试,还可以进行互连测试和板级的器件存在性测试。
- Unit Level Circuit Switching System 单元级线路转接系统
- Under pressure, Murray in the sixth inning to break lesson Board leveled at 3-3 ping! 压力之下，穆雷在第六局破发还以颜色将局分扳成3-3平！
