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- analog standard cell 模拟标准单元
- Author presents the design of MCML standard cell based on the BDD Algorithm. 分析了一种基于二叉判定图算法的MCML标准单元的设计方法。
- On the other hand, some devices, such as standard cell phones, are truly designed to be standalone. 另一方面，有些设备，比如普通的手机，则被设计成完全是独立使用的。
- A new incremental placement algorithm C-ECOP for standard cell layout is presented to reduce routing congestion. 摘要提出了一种降低走线拥挤的标准单元增量式布局算法C-ECOP。
- Then the circuit network is generated using resistance interconnect model and standard cell equivalent current model. 提出了一种对基于标准单元芯片计算其电源线网的静态电压降的分析方法。
- If cared for properly, standard cells are very stable. 如果处理得当，标准电池是非常稳定的。
- This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC). 采用标准单元方法的集成电路设计系统是一个用于专用集成电路（ASIC）设计的自动布图系统。
- Conclusion Non-tumorigenic transformed cell can be served as a standard cell line to study the function and growth characteristics of normal cell. 结论无致瘤性的一般转化细胞可作为标准细胞研究正常细胞的生理功能及其相关特性。
- The experimental results demonstrate that the DPA-resistant standard cell library can counteract DPA attacks effectively. 实验结果表明，这种标准单元库能够很好地起到防DPA攻击的作用。
- Japanese variant ofTACS Analog Standard 派生的日本TACS系统
- Job description:Responsibility: Layout design of custom digital logic， standard cell， data path cell， SRAM and Regis...... ... 公司名称：北京中星微电子有限公司工作地点：北京市发布时间：2009-7-23
- Low voltage measurement applications include standard cell comparisons and high resolution temperature measurements and microcalorimetry. 低电压测量的应用包括标准电池的比对、高分辨率的温度测量以及微量热计等。
- The new algorithm is applied to find the target location of cell during the placement optimization, and it is combined with a heuristic local optimization approach to experiment on MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks. 针对集成电路标准单元模式的布局问题;提出了一个全新的基于改进等分节点法的启发式标准单元布局算法(TETP).;该算法在优化布局过程中采用改进的等分节点法寻找单元目标位置;同时结合局部寻优的启发式算法;对MCNC(MicroelectronicsCentreofNorth-Carolina)标准单元测试电路进行实验
- The result of simulation shows the 4-input NOR constructed by standard cell has transmission delay of 150ps per gate, rise time of 380ps, fall time of 50ps and power dissipation of 1.30mw per gate. 模拟结果表明;由标准单元组成的四输入或非门单门延迟仅为150ps/门;上升时间为380ps;下降时间为50ps;功耗为1.;30mW/门。
- MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%. 对MCNC标准单元测试电路中组合和时序电路的实验结果显示;电路经过时延驱动优化布局后的最大路径时延最多减少了31%25.
- Then, based on Malaysian ARTISAN 5metal,0.25um standard cell library, I designed a corresponded hard core and explained design details such as synthesis principles,place and route steps,clock-tree generated technique etc. 随后;进行了TOP-DOWN 流程设计探索;基于马来西亚Artisan 5metal;0.;25um 标准单元库讨论了ASIC 综合、设计规范、布局布线、时钟树生成等设计问题。
- Based on the DFM flow and design styles,a set of DFM friendly 90nm standard cells are designed. 依靠以上DFM技术方法 ;完成了实际 90nm工艺标准单元可制造性设计工作 .
- As shown in Figure 4-37, the negative terminals of the standard cells, V1 and V2, are connected. 如图4-37所示，标准电池V1和V2的负端连在一起。
- Sims uses those setups mostly to calibrate Zener voltage references, but she also calibrates voltage standard cells. Sims大多使用那些设备来校准齐纳电压参考，也校准电压标准单元。
- The RTL (Register Transfer Level)design is accomplished by Veirlog hardware description language, and synthesized with the standard cell library of SMIC 0.18um. The working frequency of the adaptive filter is 50MHz. 本设计采用Verilog 硬件描述语言完成系统的RTL(Register Transfer Level)级设计;选用SMIC 0.;18um 标准单元库完成逻辑综合;系统工作速度为50MHz。
