The hardware structure is introduced,emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.

• 介绍了新型通信控制器的硬件设计,着重描述了通信接口部分,用复杂可编程逻辑器件CPLD解决了CAN控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。