The controller is designed with hardware description language VHDL at RTL level, and implemented with single CPLD.

 
  • 控制器采用VHDL(超高速集成电路硬件描述语言)语言在RTL(寄存器传输级)级设计;并在单片CPLD(复杂可编程逻辑器件)上实现.
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