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- test power dissipation 测试功耗
- The total power dissipation is only 1.5mW. 相较于市场上总级漏电保护芯片需要的近百毫瓦;整个芯片总功耗仅需1.;5mW。
- Contact heating is caused by I2R power dissipation. 接触发热是由于I2R功耗引起的。
- The reduction in size of components and circuits for increasing package density and reducing power dissipation and signal propagation delays. 减少元件和电路的几何尺寸，以达到增加电路的封装密度、减少功耗和减小信号传播延迟的目的。
- Improve the power factor and reduce the reactive power dissipation. 提高系统的功率因素,减少无功损耗。
- Features: Low collector saturation voltage, high power dissipation. 特点:饱和压降低，集电极耗散功率高。
- A power dissipation model of 4H-SiC MPS was established. 建立了4H-SiC MPS的功率损耗的解析模型并对其功率损耗特性进行了计算。
- Test results show the noise figure is 1.47 dB,power gain 19.97 dB,power dissipation 1.4 mW,image-rejection 42.4 dB and input-refered third-order intercept point -15.53 dBm. 实验测试表明;该低噪声放大器的噪声系数为1.;47 dB;功率增益为19
- By the test and application, the system workswel,l which features reliable performance, high resolution, low power dissipation aswell as better response rate. 通过测试应用表明,该仪表具有工作性能稳定可靠、测量精度高、功耗低和反应速度快等特点。
- Measure Microamps to Amps or Reduce Power Dissipation by 99%,You Decide! 测量微安至安培级电流，或将功耗降低99%25，由你定!
- CMOS device dimensions scale down to the very deep submicrometer.ICs are going towards higher density, higher speed and lower power dissipation making new challenges on IC test and design for test. 摘要CMOS器件进入超深亚微米阶段，集成电路(IC)继续向高集成度、高速度、低功耗发展，使得IC在测试和可测试性设计上都面临新的挑战。
- Case study on the 39-bus New England test power system shows the validity and practicability of the proposed method. 10机39节点新英格兰典型系统的仿真算例表明了方法的有效性和实用性。
- Compared with the traditional mixed mode test, the test power caused by pseudo-random test patterns was decreased. 与传统的混合测试模式相比，克服了伪随机测试阶段带来的功耗问题。
- Pertaining to a low-voltage condition used with static RAM to reduce power dissipation when inactive (when not being read or written). 用于说明下述的一种低压状态,当静态ram暂停不用(既不读也不写)时,供给静态ram低电压以减少功率损耗。
- The frequency changer set is adopted to providing test power, which regulates the electric voltage and frequency. 通过采用变频机组提供试验电源，实现电源电压与频率的调节。
- Sometimes I listen to music at low volume so the switch can be used to save power dissipation. 有时我在小音量听音乐,此开关能用来节省电源消耗。
- This will determine the average power dissipation capacity needed in the DB resistor. 这将决定制动电阻的平均消耗能力。
- Experiments on ISCAS circuits show that, compared with the pseudo random BIST, SWR-BIST effectively reduces the test power by 74%. 在ISCAS电路上实验的结果，相较于传统自我测试技术，区段加权乱数自我测试技术可以减少74%25的功率消耗。
- Thus, software radio DDFS based on CORDIC algorithm can help to reduce chip area, power dissipation and cost. 所以CORDIC算法来实现软件无线电直接数字频率合成器有助于节省芯片面积、降低功耗、减少成本。
- The performance of the level shifter will influence the power dissipation and frequency character of the driver ICs. 高低压转换电路性能的好坏直接影响了各种驱动芯片的功耗和频率特性等。
