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- separate time sequence logic 分离时序逻辑
- The hardware structure is introduced,emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD. 介绍了新型通信控制器的硬件设计,着重描述了通信接口部分,用复杂可编程逻辑器件CPLD解决了CAN控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
- Based on Karnaugh map,the design principle and method of time sequence logical circuit auto start are put forward and expounded. 阐述了以卡诺图为基础的具有自启动功能的时序逻辑电路设计原理和设计方法。
- Investigatim on Simulated Technique of Time Sequence Logic Circuit with PSpice 时序逻辑电路的仿真实验方法探析
- Improvement of Design Methods in Sychronous Time sequence Logic Circuit 同步时序逻辑电路设计方法改进
- The Application of Algebraic Theory in Design of Synchronous Time Sequence Logic Circuits 代数理论在同步时序逻辑电路设计中的应用
- the design of the pulse asynchronous time sequencing logic circuit 脉冲异步时序逻辑电路设计
- The Analysis and Design of the Pulse Asynchronous Time Sequencing Logic Circuit 脉冲异步时序逻辑电路的分析与设计探讨
- the analysis of the pulse asynchronous time sequencing logic circuit 脉冲异步时序逻辑电路分析
- Having separate time and interests will help vitalize the marriage. 拥有各自的私人空间将会激发你们婚姻的活力。
- For convenience, the photos will be shown in time sequence. 为方便起见,这些照片将按照时间顺序展示。
- Forecasting high frequence load by time sequence method. 运用时间序列技术预测高频负荷。
- The paper draws out the work time sequence chart and the trapezia chart . 设计了机械手的手臂结构。
- This article mainly discusses the building of such sequence logic models as D_latch, D_FF and T_FF. 文中主要讨论常用时序逻辑模型(D锁存器、D触发器和T触发器)的建立。
- This means that a separate time series model will be built for each unique entry in the Model Region column. 这表示将为Model Region列的每个唯一条目建立独立的时序模型。
- To date, no direct experimental measurements of these separate time delays have been published. 迄今为止,还没有发表过对这些单独时滞进行直接试验测定的数据。
- But even so, they found ways to buy Ragnarok Online Zeny carve out separate time. 但即便是这样,他们还是想办法留出独处的时间。
- Pertaining to the occurrence of events in time sequence, with no simultaneity or overlap of events. 用于修饰或说明诸事件按时间顺序出现,既不同时也不重叠。
- Thus the response to a given stimulus (virtual stressor) can easily change in two separate time periods, even though the stimulus is the same. 因此,针对某一特定的刺激(虚拟压力)能在两个不同的时间内轻松转变,即使给予相同的刺激。
- time sequence logical circuit 时序逻辑电路