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parallel main memory structure 并行主存结构
Main memory cycle time has bottomed out. 主存贮器的周期已趋饱和。
Finally there is the main memory which relative to the external cache memory is very slow. 这样，相对外部高速缓存存储器，主存的速度非常慢。
Not enough main memory to complete the sort. 没有足够的内存,无法完成排序。
Enter main memory databases (MMDBs). 那么就采用主存数据库（mmdb）。
A small memory unit used as a go-between for the input and output units and main memory. 一种小存储装置，在输入输出装置和主存储器之间用作媒介。
Relative to the on-CPU cache, main memory is positively crawling. 高速缓存与主存中的内容必须保持一致。
In this paper, we introduce the structure of HR-tree, describe the design and method of implementing a visual demo of HR-tree based on main memory. 介绍了时空索引结构HR -树 ,为了更直观地说明HR -树的结构及其基本操作算法的执行过程 ,对基于主存的HR -树可视化演示程序的总体结构设计和主要实现技术作了较详细的描述
Relative to the on-CPU cache,main memory is positively crawling. 高速缓存与主存中的内容必须保持一致。
To use resources in ASP.NET pages, first create a parallel main assembly to store your application's resources. 要使用ASP.;NET页中的资源;请首先创建一个并行主程序集来存储您的应用程序的资源。
The top and cross-sectional views of the memory structure are shown below. 这种存储器结构的俯视图和剖析图如下面所示。
As the word and letters are entered, they are displayed in the CRT screen and stored in main memory of the personal computer. 当字母和单词被输入以后，它们显示在阴极射线管屏幕上，并且存储在计算机在主存中。
They use main memory as storage as long as the values are small. 只要值比较小,它们便会使用主内存作为存储区。
The processor accesses the cache before accessing the main memory. 处理器在存取主要的记忆之前存取隐藏所。
Copies of portions of main memory are kept in the cache. 主要记忆的部分副本在隐藏所中被保持。
In these situations, the non-interactive desktop heap (a memory structure in Microsoft Windows) can run out of memory. 在这些情况下,非交互式桌面堆(Microsoft Windows中的一种内存结构)可能会内存不足。
In direct mapped cache, the main memory space is divided into blocks. 在直接的映射隐藏所中，主要的记忆空间被区分为区段。
It also introduce the hardware structure , the memory structure and the method of receiving and delivering datum bundle of RTL8019AS chip. 在硬件上介绍了RTL8019AS网卡芯片的硬件结构和内部存储器结构,以及其收发数据包的方法。
This information is no longer retained within the computer's main memory. 这样的数据不再保留在计算机的主存贮器中。
It chooses dual-port RAM-VRAM dual memory structure and FPGA technology to implement the persistence control and display of original video information. 采用双口RAM和VRAM双存储器结构,利用FPGA技术,实现了雷达一次视频信息的余辉控制和显示;