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- The input voltage at which the output logic level changes state. 输出逻辑电平改变状态时的输入电压。
- When the keyboard or mouse wants to send information, it first checks the Clock line to make sure it's at a high logic level. 当键盘或者鼠标想发送数据时,它首先必须检查时钟线,确认它处于高电平。
- What are the input and output specifications for logic levels? 输入输出电平多少?
- Abstract: A method that adopts double level converter circuit to have made a new style of discharging device: "singlephase active inverter battery feedback discharging device", is instruduced. 摘要:提出了采用双级变换电路的方法,研制出一种新型的单相有源逆变蓄电池回馈放电装置。
- From the actual development project, this paper analyzed the logic level unmatched matters between 5V system and 3.3V system when they communicated with each other. 摘要从实际的开发项目入手,分析了5V系统与3.;3V系统在通信和控制时存在的逻辑电平不匹配的问题。
- SA-DFF compares the logic level of D-port and Q-port, automatically deactivates the internal clock when they are equal, or reactivates the internal clock when they are not equal. 自适应触发器监视D端和Q端的逻辑电平,当两者的逻辑电平相等时,就会自动把触发器的内部时钟停在逻辑高电平;
- The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the direction control (DIR) input. 设备允许数据传输从到B总线或从的B总线的一根总线在方向控制取决于逻辑水平的一根总线(DIR)输入。
- pulse width modulation / three level converter 脉宽调制/三电平变换器
- It works in a sequential manner and integrates logic level data structures, physical cell location information, and fast useful heuristics to handle large scale ECO functional changed lists. 这个解决方案以循序的方式工作,并且整合逻辑层次的资料结构与物理的元件位置资讯和快速有用的经验法则去处理大型的功能改动次序要求。
- Study of Dual PWM Three Level Converter Drives System 三电平双PWM变频调速系统研究
- With unidirectional transmission lines there is a driver circuit that always is active at one end of the line, thus ensuring defined logic levels (see Figure 5). 对单向传输线,线路上的一端始终有一个有效的驱动器电路,因此可以保证所定义的逻辑成水平(参见图5)。
- Unlike replication, which works at the logical level, database mirroring works at the level of the physical log record. 与逻辑级别执行的复制不同,数据库镜像在物理日志记录级别执行。
- At this point your logic is at fault. 在这一点上你的推理是错误的。
- The Level Convert Based on Serial Communication of MCS and PC 基于MCS单片机与PC机串行通信电平转换
- The toggle bit will retain the same logical level during all of these repeated messages. 位的切换将保留相同的逻辑水平在所有这些重复的邮件。
- Power Estimation Techniques at Logic Level 逻辑级功耗估计方法的研究
- Modified Tri-States Indicator of Logic Level 改进型逻辑电平三态指示器
- Loosely, a mathematical or logic operator. 不严格地说,一种数学或逻辑运算符。
- I'd like a room on the upper level. 我想要楼上的房间。