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- programming logic gate array FPGA 可编程逻辑门阵列FPGA
- Programmable logic, in particular field programmable gate array (FPGA) is such a solution. 可编程逻辑,特别是现场可编程门阵列(FPGA)便是这样的解决方案。
- Lesson1 How does a logic gate in a microchip work? 第一课芯片上的逻辑门是如何工作的?
- After study a series array multipliers algorithms and architectures, . the author design a high-performance multiplier in logic gate level, which using Booth and Wallace skill. 本文研究讨论了各种不同阵列乘法器的结构和原理,并完成了在门电路级设计了32位基4Booth编码并采用42压缩的Wallace高性能阵列乘法器电路。
- logical gate array 逻辑门阵列
- A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software. 磁处理器由逻辑闸阵列所组成,其中每个闸都可以由软体独立编程。
- This paper introduces a method to implement UARTbased on Field Programmable Gate Array(FPGA). 文章介绍了一种在现场可编程门阵列(FPGA)上实现UART的方法。
- A new digital beam forming (DBF) method is proposed. It combines the parallel delay LMS (PDLMS) algorithm and the field programmable gate array (FPGA). 采用高并行度的并行延时最小均方 (PDLMS)算法 ,用现场可编程门阵列 (FPGA)实现自适应数字波束形成模块。
- SSI chips are usually basic logic gates and flip-flops. 小型集成电路通常是最基本的逻辑栅门。
- The prototype of a Line - doubler system was finally implemented in hardware using FPGA (Field Programmable Gate Array) technology. 根据这种自适应处理的思想,用FPGA(现场可编程逻辑器件)进 行原形开发。
- Having a separate filter allows users to customize their filter respose, which can be done with one of our own DSPs or with a gate array. 采用单独的滤波器则便于用户定制滤波器响应,这可通过我们的DSP或通过门阵列完成。
- Literal Logic Gate, ternary invertor has been explained by this quenching concept. 主要从事化合物半导体器件及其集成电路、单片及混合光电集成电路的研究工作。
- We implement 2-D DCT function with Field Programable Gate Array (FPGA), and verify the design by the function simulation and timing simulation. 吾人使用FPGA实现非同步2D-DCT,并藉由功能模拟及时序模拟,来验证设计正确性。
- A high-resolution flight time measurement system based on a single field programmable gate array (FPGA) in laser altimeter is designed. 设计了在激光测高系统中基于单芯片现场可编程门阵列(FPGA)的高精度时间间隔测量模块。
- It details the IC design process and VLSI circuits, including gate arrays, programmable logic devices and arrays, parasitic capacitance, and transmission line delays. 它详细规定了集成电路设计过程和超大规模集成电路电路,包括门阵列,可编程逻辑器件和阵列,寄生电容,及输电线路的延误。
- Then the hardware implementation scheme is discussed in detail, and the method of adopting Field Programmable Gate Array (FPGA) to realize control of the module is expatiated. 接着详细论述了模块的硬件实现方案,并着重分析了采用现场可编程门阵列(FPGA)技术控制模块的实现方法;
- An advanced digital controller based on Digital Signal Processor(DSP) and Field Programmable Gate Array(FPGA) is developed and applied in DCI-UPQC successfully. 同时,开发了一套适用于电力电子装置的基于数字信号处理器(Digital Signal Processor,简称DSP)和(Field Programmable GateArray,简称FPGA)的先进数字控制平台,成功地将其应用于DCI-UPQC样机。
- Once this occurs, even though the ions may be widely separated, the manipulation of one of the qubits will affect the other, allowing the construction of a CNOT logic gate. 一旦这事发生了,即使离子距离很远,操纵其中一个量子位元时还是会影响到另外一个,所以可以做出成功的CNOT逻辑闸。
- The basic concept of Evolvable Hardware(EHW) is introduced.Function Level EHW is explained based on Genetic Algorithm(GA) and Field Programmable Gate Array(FPGA). 介绍了可进化硬件的基本思想,阐述了基于遗传算法和现场可编程门阵列的函数级进化方法及其特点。
- A spatiotemporal chaotic map is digitized to develop a highly paralleled PRBS generator that accommodates to FPGA (Field Programmable Gate Array) implementation in present paper. (译):阿时空混沌地图是数字化发展的高度并行PRBS发生器,可为FPGA的(现场可编程门阵列)执行本文件。