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- A new architecture of digital channelized receiver based on sliding DFT is presented. 摘要提出了一种基于滑动DFT的数字信道化接收机的结构设计。
- A new digital radio frequency memory(DRFM) system architecture based on digital channelized receiver is introduced. 提出一种基于数字信道化接收的数字射频存储(DRFM)系统设计方法。
- In this paper, we use a common deducing method to acquire an efficient architecture based DFT polyphase filter banks to realize wideband digital channelized receiver. 采用一种具有普遍性的推导方法得到基于DFT多相滤波器组的宽带数字信道化接收机高效结构,并且将瞬时测频技术应用于该结构中,提出了一种数字信道化瞬时测频接收机方案。
- This arithmetic is helpful to design a real-time disposeing digital channelized receiverthe.A design method of channelized receiver based on poly-phase filter is discussed. 具体分析了一种基于多相滤波器组的信道化接收机的设计方法,较好地解决了高速ADC与低速信号处理器之间的矛盾问题;
- The digital channel receiver must have the ability of processing large number of data instantaneously to ensure the instantaneity of the system. 为了保证系统的实时性,数字信道化接收机要求具有实时分析处理大量数据的能力。
- A Model of Wide-band, High-resolution Digital Channelized Receiver and Its Realization 一种大带宽高分辨力数字信道化接收机
- digital channelized receiver 数字信道化接收
- An Efficient Method of Digital Channelization Receiving 一种高效数字信道化接收方法
- There are two difficulties when applying the channelized receiver to intercept a broadband phase coded signal (PCS). 数字信道化接收机在侦收宽带相位编码信号时主要存在两个难点。
- Digital channelizing receiver 信道化接收机
- This paper focuses on the principles and method of mapping circuit in digital cable television(DVB-C),DVB-C System and implementation in ASIC(Applicatio n Specific Integrated Circuits)of DVB-C channel receiver. 在简要介绍DVB接收系统基本结构的基础上,分析了DVB-C标准下接收机中的映射原理,电路设计的方法及其在专用集成电路芯片(ASIC)上的实现。
- This Ku-band three channel Receiver consists of SPST modules,LNA modules and image rejection mixer modules. 本文根据Ku波段集成接收机的总体指标确定了各模块的设计指标；
- Based on this,it introduce the design of a new project of the best digital channel,that of better design of CIC,HB, and FIR filter. 还研究了抽取滤波的设计，抽取滤波包括CIC、HB、FIR滤波器的设计以及它们的总体设计，这是本文的重点。
- A state machine with 28 states is designed in the CPLD to realize the digital channel display,time line display and trigging position display. 在CPLD里设计了一个具有28个状态的状态机来实现数据通道显示、时间线显示和触发位置显示。
- The last chapter studies the characteristics and methods of SOC design, and advances the scheme of byte processing part in DVB-S channel receiver for SOC design. 第八章研究了SOC设计的特点和方法，并讨论了面向SOC设计而实现DVB-S信道接收芯片字节处理部分的策略。
- Millimeter wave circuits for precise guided Weapons and Channelized receivers are discussed in this paper. 讨论了毫米波精导武器和信道化接收机中的集成电路。
- Digital Data Network(DDN) is a data transmisston network using digital channels. 数字数据网(DDN)是采用数字信道来传输数据信号的数据传输网。
- Just being online is not enough to leverage digital channels to drive business imperatives. 仅仅建立网络业务，并不足以利用数字渠道以推动业务。
- This property is used to develop the Clutter Projection Canceller and Clutter Channel Receiver, which realize quasi-optimum performance by small-scale partially adaptive processing. 利用杂波的时空等价特性构造的实时投影法则不能达到 满意的性能。
- A digital data network (DDN) is a data transmission network within which digital channels are utilized for data signal transmission. 数字数据网(DDN)是采用数字信道来传输数据信号的数据传输网。
