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- digital clock pulse 数字钟脉冲
- digital clock pulse generator 数字钟脉冲发生器
- Buying Letter Opener Digital Clock. 南非求购数码钟。
- Digital Clock Control - Digital Clock Control. 这是一个数字显示式时钟控件。
- That is a part containing digital clock functions. 那是数字时钟的零件。
- Study of the design of programmability digital clock with ISP devices. 数字电路课程设计。
- A digital clock ticks down, and behind it is a large Plexiglas window. 向下的一数字钟滴嗒声，和后它是一扇大的有机玻璃窗子。
- Trigger control circuit from complex programmable logic device (CPLD), ICL7135CN, the clock pulse circuit and optocoupler inverter constituted. 触发控制电路由复杂可编程逻辑器件（CPLD）,ICL7135CN,时钟脉冲电路、反相器和光耦构成。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一个高->低时钟跳变时，（或者在最后一个时钟脉冲的下降沿之后）主机将时钟拉低，键盘/鼠标不必重新传输任何数据。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/ mouse does not need to retransmit any data. 如果在第一个高->时钟跳变时，（者在最后一个时钟脉冲的下降沿之后）机将时钟拉低，键盘/标不必重新传输任何数据。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the a last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一个高->低时钟跳变时，（或者在最后一个时钟脉冲的下降沿之后）主机将时钟拉低，键盘/鼠标不必重新传输任何数据。
- The parallel loading of the flip-flop can be synchronous (i.e., occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register. 触发器的并行加载可以是同步的（即在时钟脉冲到达时发生）或异步的（不依赖于时钟），这取决于移位寄存器的设计。
- A basic method for constructing the control system of digital clock using CPLD,ispLS1032-70PLC84(Lattice Semiconductor Corporation)and ISP Synario System3.0 Software is introduced. 以Lattice半导体公司的ispLSI10 3 2E - 70PLCC84为典型器件 ;ISPSynarioSystem3 .;0为编程软件;介绍了利用在系统高密度可编程逻辑器件构成数字钟控系统的基本方法。
- Note that a set of lights attached to O1, O2, O3 would display the numbers of full clock pulses which had been completed, in binary (modulo 8), from the first pulse. 注意，一组接在O1,O2,O3上的灯泡将以二进制（模8）形式显示第一个脉冲以来已完成的完整时钟脉冲数。
- Apart from leisure Sato, found another way to achieve the digital clock, although the effect is not in front of his comrades, but the attitude of the spirit of learning I published my thoughts about. 闲暇琢磨之余，发现了另外一种实现数字钟的方法，虽然效果没有前面那位同志好，但本着学习的态度我把我的想法发布一下。
- A microprocessor designer may decide to make all instructions last five clock pulses. 微处理机设计人员可以决定使所有的指令持续五个时钟脉冲。
- LSI chips are medium to large size memory chips, 8 bit microprocessors, digital clocks or calculators. 大规模集成电路芯片是中等到大规模的记忆芯片，用于8位处理器、数字时钟和计算器。
- Programmable output clock pulse width 输出脉冲宽度可编程
- Nobody ever heard of analog clocks until digital clocks became common, so "analog clock" is a retronym. 在数字时钟变得常见之前没人听说过模拟时钟（analog clock），所以模拟时钟是一个返璞词。
- LSI chips are medium to large size memory chips,8 bit microprocessors,digital clocks or calculators. 大规模集成电路芯片是中等到大规模的记忆芯片，用于8位处理器、数字时钟和计算器。
