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- Firstly, the principle and realization of the step acquisition and delay locked loop are discussed. 首先，论文讨论了步进捕获延迟锁定环的原理及实现机理。
- muhipath estimation delay locked loop 多径估计延迟锁相环
- delay locked loop (DLL) 延迟锁相环
- delay locked loop(DLL) 延时锁定环
- delay lock loop(DLL) 延迟锁定环
- DLL(delay lock loop) 延迟锁环
- Full-Digital Noncoherent Delay Locked Loop for Satellite Ranging 应用于卫星测距的非相干二元鉴相延迟锁相环
- A New Mixed-mode Design of DCM Clock Delay Locked Loop 一种新型混合信号时钟延时锁定环电路设计
- An OFDM signal waveform based delay lock loop algorithm 一种基于OFDM信号波形的延迟锁相环算法
- Use of the Extended Kalman Filter to Improve the Delay Locked Loop IN GPS GPS中使用扩展卡尔曼滤波器改进的延迟锁定环
- delay locked loop 延迟锁相环
- Coherent Delay Lock Loop(CDLL) 相干延迟锁定跟踪环
- delay lock loop 延迟锁定环
- Noncoherent Delay Lock Loop 非相干延迟锁定环
- One example is the phase comparator of a phase locked loop. 一个例子是相锁环状态下的相位比较器。
- Phase locked loop (PLL) has been widely used in communication system. 锁相环路在通信系统中得到了广泛的应用。
- Resolution of Systematic Design Trouble with PLD Interior Phase Lock Loop. 使用PLD内部锁相环解决系统设计难题。
- The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed. 定量分析了数字式锁相倍频器输出信号的相位抖动.
- TMS320F240 DSP is used to realize the digital Phase Locked Loop(PLL) and real-ize the hot-swap function of the parallel system. 采用TMS320F240型DSP芯片实现数字锁相同步,实现并联系统的热插拔功能。
