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- component state machine 组件状态机
- What Exactly Is a Finite State Machine? 有限状态机定义?
- The state machine is stacked against the people. 国家机器与人民对立。
- Each component type has an associated source file format for its implementation artifact, such as a Java file, state machine, or SQL file. 每种组件类型都有用于其实现构件的相关源文件格式,例如Java文件、状态机或SQL文件。
- A business state machine can be implemented by a BPEL process. 业务状态机可以透过BPEL流程来实现。
- Therefore, the introduction of the finite state machine concepts. 为此，引入有限状态机的概念。
- A finite state machine can only be in one state at any moment in time. 有限状态机在任一时刻都只能够处于一种状态中。
- At the heart of every state machine lies an implementation of double dispatch. 在每个状态机的核心都有一个双重分派的实现。
- Neither approach - processes or state machines - is superior. 两种方法过程或者状态机中没有哪个是更好的。
- Record your answers in the following table:Components--Component state,stop and notify the instructor when you have finished this exercise. 将您的答案记录在下表中：组件----组件状态，完成这个练习后就可以停下来并通知指导者。
- Some finite state machines fall into this category, for example. 例如,一些有限状态机属于这一类别。
- Demonstrates how to create a state machine workflow that implements a speech-driven menu application. 演示如何创建用于实现语音驱动菜单应用程序的状态机工作流。
- You can also query the state machine? S current state to determine an operation? S validity. 您也可以查询状态机的当前状态来确定操作的有效性。
- For the feature of GUI and OO, A model based finite state machine(FSM) for conformance testing is presented. 一、针对C/S系统的GUI和OO特性，提出了基于有限状态机(FSM)的一致性测试模型。
- The Westphalian system did not create the nation state, but the nation state meets the criteria for its component states (assuming that there is no disputed territory). 威斯特法伦系统并没有创造民族国家，但是民族国家满足这个系统对国家的要求（前提是民族国家之间没有领土问题）。
- The ASM( algorithm state machine) chart is the flow chart used for the description of digital systems . ASM图是算法状态机的简称,是一种用来描述数字系统算法的流程图。
- It is difficult to estimate precise probabilities of component states and system states in multistate systems, because of complexity and incompleteness of statistical data. 摘要由于多态系统的复杂性、统计数据的不完备等诸多原因，人们往往不能精确地确定系统及其元素的状态概率，也即存在着状态概率表示及计算的不确定性问题。
- High-level design intents such as finite state machine (FSM) and counter are commonly used in modern VLSI design. 高阶设计资讯被广泛的应用在现今超大型积体电路的设计上，如：有限状态机、计数器等等。
- This program is designed to take a regular expression and produce a graph of the state machine that is used to parse the regular expression. 这个程序旨在接收一个正则表达式并产生一个状态机的时序图，状态机用来分析正则表达式。
- For every NFA a deterministic finite state machine (DFA) can be found that accepts the same language. 保持机器当前可能处在的所有状态的集合数据结构。
