您要查找的是不是:
- Time clock signal source directly fetches from clock signal of PCI bus in the computer system or signal generator, which can generates high frequency time clock signal. 该时钟信号源直接取自于该电脑系统中PCI总线的时钟信号或是一可产生高频时钟信号的时钟信号产生器,用以供应该计数电路所需的输入时钟信号。
- clock signal generator 时钟信号发生器
- The device always generates the clock signal. 时钟信号总是由设备端生成的。
- With the INT/EXT that while LED expresses GPS signal generator, condition reachs fiducial clock. 用LED暗示GPS信号发生器的同时状况及基准时钟的INT/EXT。
- This software supports ESG, MXG and PSG signal generator. 该软件撑持ESG、MXG和PSG信号发生器。
- The Signal Generator will start when you click MON or REC . 单击 MON 或 REC ,信号发生器将开始工作。
- The speed with which your microcomputer executes programs will vary linearly with the speed of your clock signal. 你的微型计算机执行程序的速度将与你的时钟信号的速度成线性关系。
- The transition from voltage to no voltage is referred to as the trailing edge of a clock signal. 电感从一定值下降到0值的跃迁叫做时钟信号的后沿。
- SRD narrow pulse signal generator basis on clock drive belongs to the electronic technical field, which relates to the technique of super wide-band communication, pulse radar and pulse source. 一种基于时钟驱动的SRD窄脉冲信号发生器,属于电子技术领域,涉及超宽带通信、脉冲雷达和脉冲源技术。
- The system can hold the 'clock' signal inactive to inhibit the next transmission. 系统拉低时钟线,将禁止下一次传输。
- An implementation of Pipelined digital signal generator is provided. 为实现流水线数字信号产生器提供了一种实现方案。
- The key difference between these two is that the DCE device provides the clock signal for the communications on the bus. 这两种类型之间的主要差异是DCE装置在汇流排上提供通讯使用的时脉信号。
- Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accom-plished by an external clock signal. 它的功能是当感应到输入电压界限时提供一个锁存开关,通过外部时钟信号完成复位。
- The clock signal with precise duty cycle produced by DCM is used in the bus data DDR transmission.The simulation results are also given. 利用DCM产生的具有精确占空比的时钟信号,给出了其在DDR总线数据传输中的应用,并给出了仿真结果。
- Thus, the clock signal passing between the FPGA and the ADC's for each channel will physically clock in this frequency range. 这样,FPGA和AD转换器之间的时钟频率物理上落于这个频率窗口之内。
- For synchronous connections, where a clock signal is needed, either an external device or one of the DTEs must generate the clock signal. 为了达到同步的连线,需要有时钟讯号才行,有可能是一台外部设备或者其中一台资料终端设备必须产生时钟讯号。
- Signal generation and handling in particular add extra complexity. 信号的生成和处理尤其增加了额外的复杂性。
- A method of realizing clock signal by CPLD during GPS desynchronization.Automation of Electric Power Systems,2003,27(17):64-67. GPS失步后时钟信号的CPLD实现方法.;电力系统自动化;2003;27(17):64-67
- A signal generator based on ARM7 MCU (Micro Controller Unit) is developed with digital waveform synthesis technology. 采用数字波形合成技术设计实现了基于ARM7单片机的信号发生器系统。
- A new scanning signal generator with multifunction for electronic beam welder (EBW) is reported in this paper . 介绍了一种新型的电子束焊机用多功能数字扫描信号发生器。