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- clock signal frequency 时钟信号频率
- The device always generates the clock signal. 时钟信号总是由设备端生成的。
- Thus, the clock signal passing between the FPGA and the ADC's for each channel will physically clock in this frequency range. 这样，FPGA和AD转换器之间的时钟频率物理上落于这个频率窗口之内。
- Time clock signal source directly fetches from clock signal of PCI bus in the computer system or signal generator, which can generates high frequency time clock signal. 该时钟信号源直接取自于该电脑系统中PCI总线的时钟信号或是一可产生高频时钟信号的时钟信号产生器，用以供应该计数电路所需的输入时钟信号。
- The speed with which your microcomputer executes programs will vary linearly with the speed of your clock signal. 你的微型计算机执行程序的速度将与你的时钟信号的速度成线性关系。
- The transition from voltage to no voltage is referred to as the trailing edge of a clock signal. 电感从一定值下降到0值的跃迁叫做时钟信号的后沿。
- In pulse code modulation,a spurious signal formed from beats between the signal frequency and the sample frequency. 在脉冲编码调制中,信号频率和取样频率之间的差拍所引起的伪信号。
- The system can hold the 'clock' signal inactive to inhibit the next transmission. 系统拉低时钟线,将禁止下一次传输。
- This instrument can measure AC signal frequency either of the single phase voltage or of the tri-phase voltage. 本表既可测交流单相电压信号之频率,亦可测交流三相电压信号之频率。
- The key difference between these two is that the DCE device provides the clock signal for the communications on the bus. 这两种类型之间的主要差异是DCE装置在汇流排上提供通讯使用的时脉信号。
- The high permeability of the ferromagnetic reeds in a reed relay causes a pronounced skin effect with increasing signal frequency. 干簧式继电器中铁磁簧片的高磁导率会随信号频率的增加而产生很强的趋肤效应。
- Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accom-plished by an external clock signal. 它的功能是当感应到输入电压界限时提供一个锁存开关，通过外部时钟信号完成复位。
- In pulse code modulation, a spurious signal formed from beats between the signal frequency and the sample frequency. 在脉冲编码调制中,信号频率和取样频率之间的差拍所引起的伪信号。
- The clock signal with precise duty cycle produced by DCM is used in the bus data DDR transmission.The simulation results are also given. 利用DCM产生的具有精确占空比的时钟信号,给出了其在DDR总线数据传输中的应用,并给出了仿真结果。
- It has sharp impedance characteristics at desirable frequency and it does affect the signal frequency. 在某一频率区域内，其阻抗值急剧上升，从而在特定的频率内可获得较高的衰减速效果而对信号不产生影响。
- For synchronous connections, where a clock signal is needed, either an external device or one of the DTEs must generate the clock signal. 为了达到同步的连线，需要有时钟讯号才行，有可能是一台外部设备或者其中一台资料终端设备必须产生时钟讯号。
- A false signal in telecommunication links from beats between signal frequency and sampling frequency. 假信号信号频率和取样频率之间的拍子在无线电通信线路产生的假信号。
- A method of realizing clock signal by CPLD during GPS desynchronization.Automation of Electric Power Systems,2003,27(17):64-67. GPS失步后时钟信号的CPLD实现方法.;电力系统自动化;2003;27(17):64-67
- The method tracks signal frequency by LMS algorithm and analyses the phase of output signal. 通过采用最小均方误差自适应滤波算法 ,跟踪信号的单一频率 ,分析输出信号的包络 ,实现PCM/FSK信号的解调。
- They can also be helpful if the original signal frequency does not fit in the DUT testing frequency. 如果原始信号频率不适合于DUT的测试频率，信号滤波也非常有用。
- 今日热词
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- 深远海浮式风电平台 - deep-sea floating wind power platform
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- 京雄高速公路 - Beijing-Xiongan expressway
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- 农业及相关产业增加值 - the added value of agriculture and related industries
