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- Author presents the design of MCML standard cell based on the BDD Algorithm. 分析了一種基於二叉判定圖演算法的MCML標準單元的設計方法。
- On the other hand, some devices, such as standard cell phones, are truly designed to be standalone. 另一方面,有些設備,比如普通的手機,則被設計成完全是獨立使用的。
- A new incremental placement algorithm C-ECOP for standard cell layout is presented to reduce routing congestion. 摘要提出了一種降低走線擁擠的標準單元增量式布局演算法C-ECOP。
- Then the circuit network is generated using resistance interconnect model and standard cell equivalent current model. 提出了一種對基於標準單元晶元計算其電源線網的靜態電壓降的分析方法。
- If cared for properly, standard cells are very stable. 如果處理得當,標準電池是非常穩定的。
- This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC). 採用標準單元方法的集成電路設計系統是一個用於專用集成電路(ASIC)設計的自動布圖系統。
- Conclusion Non-tumorigenic transformed cell can be served as a standard cell line to study the function and growth characteristics of normal cell. 結論無致瘤性的一般轉化細胞可作為標準細胞研究正常細胞的生理功能及其相關特性。
- The experimental results demonstrate that the DPA-resistant standard cell library can counteract DPA attacks effectively. 實驗結果表明,這種標準單元庫能夠很好地起到防DPA攻擊的作用。
- Job description:Responsibility: Layout design of custom digital logic, standard cell, data path cell, SRAM and Regis...... ... 公司名稱:北京中星微電子有限公司工作地點:北京市發布時間:2009-7-23
- Low voltage measurement applications include standard cell comparisons and high resolution temperature measurements and microcalorimetry. 低電壓測量的應用包括標準電池的比對、高解析度的溫度測量以及微量熱計等。
- The new algorithm is applied to find the target location of cell during the placement optimization, and it is combined with a heuristic local optimization approach to experiment on MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks. 針對集成電路標準單元模式的布局問題;提出了一個全新的基於改進等分節點法的啟髮式標準單元布局演算法(TETP).;該演算法在優化布局過程中採用改進的等分節點法尋找單元目標位置;同時結合局部尋優的啟髮式演算法;對MCNC(MicroelectronicsCentreofNorth-Carolina)標準單元測試電路進行實驗
- Daniel sprang his marriage on his parents. 丹尼爾出人意料地向父母宣布了他的婚事。
- The result of simulation shows the 4-input NOR constructed by standard cell has transmission delay of 150ps per gate, rise time of 380ps, fall time of 50ps and power dissipation of 1.30mw per gate. 模擬結果表明;由標準單元組成的四輸入或非門單門延遲僅為150ps/門;上升時間為380ps;下降時間為50ps;功耗為1.;30mW/門。
- She is not the type of girl that Daniel goes for. 她不是丹尼爾追求的那種女孩子。
- MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%. 對MCNC標準單元測試電路中組合和時序電路的實驗結果顯示;電路經過時延驅動優化布局后的最大路徑時延最多減少了31%25.
- Then, based on Malaysian ARTISAN 5metal,0.25um standard cell library, I designed a corresponded hard core and explained design details such as synthesis principles,place and route steps,clock-tree generated technique etc. 隨後;進行了TOP-DOWN 流程設計探索;基於馬來西亞Artisan 5metal;0.;25um 標準單元庫討論了ASIC 綜合、設計規範、布局布線、時鐘樹生成等設計問題。
- Not Daniel, if you don't mind-Mr Green to you. 對不起,不是丹尼爾,你應該稱格林先生才對。
- Daniel, uh, what's his name, daniel jones? 丹尼爾,呃,他叫什麼名字,丹尼爾。瓊斯?
- I am Daniel Jones, but I go by my nickname, Dan. 我叫丹尼·瓊斯。不過我用教名的略稱:丹。
- The RTL (Register Transfer Level)design is accomplished by Veirlog hardware description language, and synthesized with the standard cell library of SMIC 0.18um. The working frequency of the adaptive filter is 50MHz. 本設計採用Verilog 硬體描述語言完成系統的RTL(Register Transfer Level)級設計;選用SMIC 0.;18um 標準單元庫完成邏輯綜合;系統工作速度為50MHz。