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- 冗餘Booth演算法redundant Booth algorithm
- 該結構所採用的新型Radix-16 Booth演算法吸取了冗餘Booth編碼與改進Booth編碼的優點,能簡單、快速地產生複雜倍數.Taking advantages of the merits of redundant Booth encoding and modified Booth encoding,the novel Radix?16 Booth algorithm of the structure can simply and quickly generate complicated multiples.
- 乘法器採用改進的Booth演算法,簡化了部分積符號擴展,使用Wallace樹結構和4-2壓縮器對部分積歸約。This multiplier used modified Booth Algorithm, Wallace tree and 4- 2 compressor.
- 對於SA-DCT,採用Booth演算法對DCT係數編碼,用可編程處理器的概念實現不同長度DCT的變換,同時提出了一種新穎的轉置寄存器陣列實現所必需的轉置操作,整個結構面積為12500門,最大功耗為2.54mW。Second, for the design of SA-DCT, booth encoding is introduced for coefficients of DCT, and the design concept of programmable processor is adopted to computing various-length DCT while a novel transposed register array is proposed to implement the transpose operation necessary for SA-DCT. The proposed SA-DCT core costs about 12500 gates with the maximum power consumption of 2.54mW.
- 冗餘redundancy
- 冗餘的superfluous
- 演算法設計algorithm design
- Booth編碼Booth encoding
- 演算法設計與分析The Design and Analysis of Algorithm
- Booth編碼器Booth recoder
- 數據冗餘data redundancy
- 控制演算法control algorithm
- 改進Booth編碼Modified Booth encoder
- 冗餘構件redundant member
- 改進的Booth編碼improved Booth encoding
- 聚類演算法clustering algorithm
- 保護冗餘protective redundancy
- 備份冗餘standby redundancy
- Booths algorithm布斯演算法
- 啟髮式演算法heuristic algorithm
