- A self-test scheme, under which all test patterns for adder under test in VLSI are produced by the adder self, is presented based on arithmetic additive generator.
- Yes. It is adopted as an additional generator error control.
- Based on arithmetic additive generator, a kind of design-for-testability and test strategy for direct-form fine-grained pipelined delayed least mean square adaptive filter is presented.
- Additional General Texts and Treatises Darwin, C.
- None of us had ever set eyes on a generator before.