This thesis first discussed the theory of AES algorithm, then described its process and structure, based on the structure ,we completed the ASIC design of AES encryption and decryption algorithm when key length is 128bits.

• 本文分析了高级加密标准算法的原理，用硬件描述语言(VHDL)描述了该算法的基本过程和结构，并基于该算法的结构，完成了高级加密标准算法密钥长度为128比特情况下的加密解密的ASIC设计，该设计是基于XC2S200FG456芯片设计的。