This thesis estimate the delay of the critical path of an improved floating-point fused multiply-add (MAF) at a qualitative level, and compare it with the basic MAF implementation.

• 摘要针对一种改进的浮点乘加器结构，对关键路径的延时进行定量的估算，并将其与传统乘加器结构的延时进行比较。