The pull-up charging and pull-down discharging of the transistor arrays of the PLA are accelerated by two feedback MOS transistors between the evaluation NMOS blocks and the outputs.

 
  • 在N电晶体计算电路与输出值之间加入两个回馈式电晶体可以加速程式逻辑阵列加法器的充电与放电速度。
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