The paper presents a multiplier circuit based on Booth algorithm when the radix equals four by studying the Booth algorithm. The carry-save-array adder and the pipeline technique are drawn into the design for improving the circuit speed.

• 通过对 Booth 算法的研究,本文提出了一种基 4 Booth 算法的硬件乘法器电路,为了提高硬件乘法器电路的运算速度,将保留进位加法电路和流水线技术引入了该乘法器电路。