The number of PCI clocks until IRDY# is asserted from FRAME# being asserted for the first data phase or from the end of the previous data phase.

 
  • 直到IRDY%23信号有效经历的PCI时钟数,从FRAME%23信号有效开始经历第一个数据期,或者从前一个数据期结束开始。
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