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- A 32 Bit Programmable Signal Processor for a Multiprocessor System Environment. 用于多处理器系统的32位可编程信号处理机
- programmable signal processor 可编程序的信号处理机
- Some vendors shipped prestandard products that used programmable digital signal processor chips to implement their modem algorithms. 有些厂商交付了标准前的产品,它们采用可编程的数字信号处理器芯片,来实现Modem算法。
- The control system of IGBT induction heating power supply is designed based on DSP(digital signal processor) and CPLD(complex programmable logic device). 用数字信号处理器(DSP)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
- The signal processor is a core circuit of a frequencyhopping fuze. 信号处理器是跳频引信的一个核心电路。
- The components includs CCD camera, decoding chip SAA7111, the programmable logic chip CPLD, read-write memory SRAM and high speed signal processor DSP. 系统采用CCD摄像头、视频解码芯片SAA7111、可编程逻辑芯片CPLD、高速可读写存储器SRAM,以及数字信号处理器DSP等核心器件。
- An advanced digital controller based on Digital Signal Processor(DSP) and Field Programmable Gate Array(FPGA) is developed and applied in DCI-UPQC successfully. 同时,开发了一套适用于电力电子装置的基于数字信号处理器(Digital Signal Processor,简称DSP)和(Field Programmable GateArray,简称FPGA)的先进数字控制平台,成功地将其应用于DCI-UPQC样机。
- The control system of IGBT induction heating power supply is designed based on DSP (digital signal processor) and CPLD (complex programmable logic device). 摘要用数字信号处理器(DSP)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
- MTI filter with multi-stage based on DSP(Digital Signal Processor) is derived. 针对多个或杂波功率谱具有多谱峰的气象杂波,导出了基于DSP实现的多级杂波抑制滤波器技术。
- The design of intelligent break controller based on a high performance DSP(Digital Signal Processor) of TMS320F 2812 and a CPLD(Complex Programmable Logic Device) of MAX7128S is introduced. 介绍了基于新型高性能数字信号处理器(DSP)芯片TMS320F2812和复杂可编程逻辑器件(CPLD)MAX7128实现的断路器智能控制单元设计。
- Programmable Signal Data Processor 可编程信号数据处理机
- The general hardware design of a fuzzy control based on digital signal processor (DSP) TMS320C32 and complex programmable logic device (CPLD) A54SX32/08 is presented. The designs of the main units in circuit are stated in detail in this paper. 介绍了基于数字信号处理器(DSP)芯片TMS320C32和复杂可编程逻辑器件(CPLD)A54SX32/08的模糊控制器的总体硬件设计,并对主要单元的电路设计进行了详细阐述。
- In this paper, a design of pseudo-code CW Rendezvous and Docking (RVD) radar signal processor is presented. 摘要介绍了某伪码连续波交会对接雷达信号处理机设计。
- Tests indicate that the signal processor can meet the requirements of Rendezvous and Docking. 实验表明,该信号处理机可以满足空间航天器交会对接的要求。
- Sound box: To make its can bear the abrupt in program signal delivers strong pulse pound and unapt attaint or lack fidelity. 音箱:为了使其能承受节目信号中的猝发强脉冲的冲击而不至于损坏或失真。
- All the functions will require faster speed of the control system and stronger ability of digital processing . The purpose of the project just is to build a 200MSPS DSO with the DSP(Digital Signal Processor) and FPGA(Field Programmable Gates Array). 对监控系统主控芯片的时钟速度及数据处理能力的要求进一步提高, 本课题的目的是探讨使用高性能的DSP(Digital Signal Processor)作为200MSPS 数字存储示波器监控系统的主控芯片,利用DSP+FPGA 结构,组成示波器系统。
- The detecting and protecting part is composed of Digital Signal Processor (DSP) and Complex Programmable Logic Device (CPLD) which can improve the real time ability and flexibility of the device. 装置的测控部分采用数字信号处理器DSP和复杂可编程逻辑器件CPLD相结合,提高了控制的实时性和灵活性。
- The paper introduced the design and development of signal processor of radar/radar-jamming experiment system based on DSP and CPLD. 主要介绍基于DSP与CPLD的雷达/雷达干扰实验系统信号处理机的设计与研制。
- Implementation and test of DSP algorithms on signal processors. 在信号处理器上实现并测试DSP算法;
- An Introduction to Digital Signal Processors,BRUNO PAILLARD ING. 数字讯号处理器简介与应用,林传生、李佩谦编着。