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- The phase noise of PLL is?88.83 dBc/Hz at 10kHz offset. 37GHz的单片锁相环电路的锁定范围为32MHz;锁定时在偏离中心频率10kHz处的相位噪声为-88.;83dBc/Hz。
- Design and phase noise analysis of a MEMS varactor is presented. 给出了一种MEMS压控电容的设计和相位噪声分析结果。
- Low SSB phasic noise conduces to detect be close to signal of carrier wave low n. 低SSB相位噪声则有助于检测靠近载波低电平信号。
- Pass phasic noise mark, can measure the phasic noise below deflection of specific carrier wave quickly. 经由过程相位噪声标记，能够迅速测量特定载波偏移下的相位噪声。
- The Time Domain Wave Form and Frequency Spectrum of Modulated Signal of uexp( tt/ Pw) Multiply by Carrier with Uniform Phase Noise. 单边递减波电压讯号乘上含有均匀相位杂讯载波之调变讯号时域波形及频谱。
- A fully integrated low phase noise LC voltage controlled oscillator(VCO) is presented. 介绍了一种全集成的LC压控振荡器(VCO)的设计。
- The properties of phase noise of Gunn oscillators are determined by the characters ofthe noise of Gunn diodes. 体效应振荡器相位噪声主要取决于体效应管的噪声。
- LC oscillators have better phase noise, but the lowest noise is obtained with the use of a quartz crystal oscillator. LC谐振器利用石英晶体振荡器产生基准源，因此抖动较小。
- DRO(dielectric resonator oscillator) has the characteristics of high frequency stability and low phase noise. 介质振荡器具有频率稳定性好,相位噪声低的特性。
- The measured phase noise is-117dBc/Hz at 4MHz off the center frequency of 4.189GHz. 其在4.;189GHz频点上4MHz频偏处所测得的相位噪声为-117dBc/Hz
- The measured phase noise of the CMU is -90.9 dBc/Hz at 10 kHz offset, and the root-mean-squared jitter is 10 ps. 时钟倍频单元输出的2.;5 GHz时钟相位噪声在10kHz频偏处为-90
- The measurement of the test chip shows that the VCO in the CRC has a wide tuning range and a low phase noise. 并已完成对10GHz压控振荡器的在芯片测试,结果表明该电路具有较低相位噪声和较大调频范围的特点。
- Secondly, the phase noise and spurs of PLL are analyzed and the formulae for calculating them are given. 接着对PLL的相位噪声和杂散进行分析，得出估算相位噪声和杂散性能的公式。
- For this reason,the paper is mainly focus on the theory and technology of low phase noise PLL design. 本文就基于此对锁相环低相位噪声理论和设计进行研究和分析。
- A design method of VCO with low phase noise time based center circuit is proposed. 提出了一种低相位噪声时基核心电路的压控振荡器的设计方法。
- However, the SSB mixing has many inherent drawbacks such as high phase noise, high power, and spurious tones. 然而，单侧频带混波有著许多先天上的缺点像是高相位杂讯，功率消耗大，以及寄生讯号。
- The effect on modulation and demodulation of QPSK via carrier phase noise can not be ignored, and it is difficult to analyze. 载波相位噪声对QPSK调制解调的影响是不可忽略的,也是难以分析的。
- The emphasis is laid on dielectric materials,frequence tuning property of DRO, optimization of phase noise,widening of DRO designs,welding,and reliability. 重点介绍了介质材料、DRO的频率调谐特性、相位噪声性能的优化、DRO的拓展设计以及焊封和可靠性。
- The external circumstance such as temperature and stress can induce nonreciprocal phase noise, which restricts the developing of high precision gyro. 光纤环所处的环境因素,如温度、应力引起的非互易性相位噪声,制约了光纤陀螺向高精度、实用化的发展。
- The results indicate that the PLL source has low phase noise and stray,and it can meet the requirement of design and system operation. 测试结果显示,该频率源相位噪声较低、杂散低,满足设计和系统使用要求。
