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- Discuss CPLD and VHDL. 讨论了复杂可编程逻辑器件CPLD技术和硬件描述语言VHDL。
- The control module of the video data acqusition card is implemented by using of the ISP technology of CPLD and VHDL programming technology. 在实际的研制过程中，利用CPLD的在系统可编程（ISP）技术和基于VHDL语言的可编程逻辑器件设计技术实现了视频数据采集卡的控制模块。
- Output formats are EDIF, XNF and VHDL. 输出格式是EDIF,XNF和VHDL。
- The control module of the radar data acquisition card is implemented by using of the ISP technology of CPLD and the VHDL programming technology. 在实际的研制过程中，利用CPLD的在系统可编程(ISP)技术和基于VHDL语言的可编程逻辑器件设计技术实现了雷达数据采集卡的控制模块。
- Nowadays,FPGA and VHDL are two important tools in embedded system design. FPGA和VHDL是当今嵌入式系统设计的两个重要工具。
- This paper briefly introduces the structures and features of programmable logic device CPLD and FPGA, and emphatically presents the characteristics of VHDL language and the reasons of choosing VHDL. 简要介绍了可编程逻辑器件 CPL D和 FPGA的结构和特点 ,着重介绍了 VHDL 语言的特点及选择 VHDL 的理由。
- An instruction decoder based on CPLD and AT89C51 is designed in this paper. 本文设计了一种基于AT89C51和CPLD的指令解码器。
- Application of VHDL in the Design of CPLD and FPGA VHDL在CPLD和FPGA设计中的应用
- The paper introduced a way of designing changeable delay chip with CPLD and discussed its realizable circuit and emulation oscillogram. 介绍了用CPLD设计可变延时芯片的方法，并讨论了具体的实现电路和仿真波形图。
- A RISC microprocessor is developed by using modular design method and VHDL language based on FPGA and EDA technology. 基于FPGA和电子设计自动化技术.;采用模块化设计的方法和VHDL语言;设计一个基于FPGA的RISC微处理器。
- The simulator based on USB interface is realized by using CPLD and USB interface chip with MCU. 为此,根据导航计算机软件提供的地面模拟演练功能,从使用方便、化设备连接和配置方面考虑,采用基于usb接口连接通讯方案成功地研制出模拟飞行仿真系统。
- This paper describes the method of realizing the function for digital logic circuit by an designing software example with MCS?51 and VHDL. 通过MCS?51汇编语言和VHDL的软件设计实例，阐述了实现数字逻辑电路功能的方法.
- A new phase detecting method based on CPLD and SCM for measuring angular shift of resolver is introduced. 介绍一种基于CPLD和单片机的旋转变压器新型鉴相式角位移测量方法和鉴相电路的设计。
- According to the characteristic of DSP algorithm to be realized , utilize abundant function module and VHDL language offered in QUARTUS to design. 根据待实现的DSP算法的特征，利用QUARTUS中提供的丰富的功能模块和VHDL语言进行设计。
- The programmable logic device and VHDL is used as input tools,which have simple software interface,good reliability and practical value. 该设计采用可编程逻辑器件，VHDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
- This method was validated by the use of CPLD and the practical test results show that it has a good performance in harmonic-suppression. 该方法与传统SPWM方法相比;不但大大降低了实现的复杂性;而且达到了预期的谐波抑制效果;经复杂可编程逻辑器件(CPLD)验证;实际的谐波测试结果表明本方法是有效的.
- The hardware accomplishes acquiring the bomb responses and testing the characteristic parameters with the techniques of DSP, CPLD and AC RMS-DC. 硬件设计上采用DSP技术、CPLD技术以及交流有效值变换技术,实现了对炸弹的响应采集和参数检测;
- I hit him fair and square on the jaw. 我不偏不倚打中他的下巴。
- Introduce PLD such as cpld and fpga as well as Xil-inx 4.2 ISE software; Use Xilinx Webpack4.2 ISE to design display of seven-segment decoder. 可编程逻辑器件cpld和fpga以及xilinx webpack 4.;2ISE的介绍:用xilinx webpack 4
- The special signal interface that was designed with ISP devices and VHDL consists of the relay-array, multi-switch circuit and correlative drive circuit. 利用ISP器件和VHDL语言设计的专用信号接口由继电器阵列、多路开关和相关驱动电路组成。
