Design criteria for such signal source are derived, upon which one can choose the PLL loop bandwidth by trade-off considerations, to get a relatively low BER, simultaneously obtain low spurious output and fast frequency hopping as well.

• 为了减小相噪对系统性能的影响，导出了此类信号源的设计判据，据此可基于折衷考虑选取环路带宽，以便同时获得较低的误码率，以及低的寄生输出和较快的频率跳变速度。