Calculation for the data from simulation shows that power dissipation of DET shift register can be reduced evidently because of using the clock with half working frequency, in comparison with its counterpart SET shift register.

• 对模拟所得数据的计算结果表明，与实现相同功能的单边沿移位寄存器相比，由于工作频率减半，双边沿移位寄存器的功耗有明显降低。