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- Bus Interface Chip 总线接口芯片
- The hardware circuit of this system is composed of PCI bus target(slave) interface chip PCI 9052, peripheral RAM and serial EEPROM. 该系统的硬件电路主要由PCI总线目标接口芯片PCI9052、外围存储器以及串行EEPROM组成。
- Hardware structure: The encryption card is made up of CPU, USB bus interface, flash store chip, WNG4 randomizer and IC card reader. 加密卡硬件结构: 该加密卡主要由主CPU、计算机USB总线接口、FLASH存储芯片、WNG4随机源和IC卡读卡器等组成。
- The data-transmission system based on PCI bus, which is composed of PCI bus target(slave) interface chip PCI9052,peripheral RAM and serial EEPROM is studied. 主要研究基于PCI总线的数据传输系统.;该系统的硬件电路主要由PCI总线目标接口芯片PCI9052、外围存储器以及串行EEPROM组成
- An interface chip used as the RS485 bus controller based on HDLC protocol was introduced, which was written in VHDL at the RTL level and implemented by a single FPGA chip. 介绍了以HDLC协议控制为基础的RS-485总线通信控制器;采用VHDL语言在RTL级设计;并在单片FPGA上实现.
- This article mainly introduces the structure and performance of PCI9054,which is the univeral interface chip of the PCI bus produced by the America PLX Corporation. PCI9054是美国PLX公司生产的PCI总线通用接口芯片,使用该专用芯片桥接PCI总线和本地总线可以无需考虑复杂的PCI总线规范,只需开发系统的硬件。
- The method of intercommunication among single chip computers was discussed. The system is composed of single chip computer module, share-memories, share-I/O,bus interface and arbitrator. 讨论了80C196MC单片机系统多微机互联方案,该系统以单片机为主模块,共享存储器、共享I/O、总线接口及仲裁器构成。
- Functionality in this area includes bus interface circuitry and a level2 cache. 本区域的功能包括总线接口线路和二级缓存。
- The chips are CY7C64613 chip, EEPROM chip and RS232 interface chip. 这三个芯片是CY7C64613芯片、EEPROM芯片和RS232接口芯片。
- PI-Bus and Its Bus Interface Unit Chip PI总线及其接口芯片
- The simulator based on USB interface is realized by using CPLD and USB interface chip with MCU. 为此,根据导航计算机软件提供的地面模拟演练功能,从使用方便、化设备连接和配置方面考虑,采用基于usb接口连接通讯方案成功地研制出模拟飞行仿真系统。
- This paper introduce the I2C bus interface of S3C44B0X, and connective method with EEPROM. 文章介绍了S3C44B0X的I2C总线接口,与EEPROM的连接方法。
- In order to reuse easily ,this IP core uses the Avalon bus interface and completes the function simulation in Modelsim. 为了满足复用,该IP核采用Avalon总线接口,同时利用Modelsim进行了功能仿真。
- The core of the design is composed by microcontroller and appropriative USB interface chip and the data store of FIFO is implemented by PDIUSBD12. 本设计选用单片机加专用USB接口芯片的方案,采用PDIUSBD12专用通信模块实现FIFO数据缓存。
- Functionality in this area includes bus interface circuitry and a level 2 cache. 本区域的功能包括总线接口线路和二级缓存。
- Details of the USB bus interface for program development of the principles, processes and routines. 详细介绍了对USB总线接口进行程序开发的原理、过程和例程。
- Design of an interface chip based on PCI local bus 一种基于PCI总线接口芯片的设计
- The adpter is composed of a bus interface module,a logic control module,an encoder/decoder and a transceiver module. 红外无线串行通信适配卡有四个模块:总线接口模块,逻辑控制模块,调制解调模块,发射接收模块。
- It adopted EZ_USB FX produced by Cypress Corporation as interface chip whose soft-configure feature made it easy to realize the function expansion of the system. 系统采用Cypress公司推出的EZ-USB FX作为接口芯片,其软配置特性便于系统的功能扩展。
- Due to no SPI serial bus interface in MCS51 scm, MCS51 scm couldn't use SPI bus interface apparatuses. 摘要MCS51系列单片机由于不带SPI串行总线接口而限制了其在SPI总线接口器件的使用。
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